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參數(shù)資料
| 型號： | LC74735NW |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 畫面疊加 |
| 英文描述： | ON-SCREEN DISPLAY IC, PQFP80 |
| 封裝： | SQFP-80 |
| 文件頁數(shù)： | 15/52頁 |
| 文件大小： | 300K |
| 代理商： | LC74735NW |
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No. 7545-22/52
LC74735NW
Command 25 (Output control 3 setting command)
First byte
Second byte
DA0 to 7
Register
Content
Notes
State
Function
7
—
1
6
—
0
Command 2 identification code
5
—
1
Output control
4
—
0
3
—
0
2
—
1
Extended command 5 identification code
1
0
1
DA0 to 7
Register
Content
Notes
State
Function
7
CEHSL
0
Normal operation
CE pin
1
CE pin held fixed at the high level
6
TOKSL
0
Normal mode
Transmissive mode
1
The color specified at address 0 in color table No. 1 is displayed
in the transmissive state.
5
VIPSL
0
Falling edge detection
Selects the detection polarity for the VSYNC signal.
1
Rising edge detection
4
OTMD2
0
Output off state (always low)
CLKOUT pin (pin 18)
1
Normal output
Output control
3
OTMD1
0
1
0
2
OTMD0
1
QRM1
0
1
0
QRM0
1
A0 to 17 output selection
Transmissive mode specification
OTMD2
OTMD1
OTMD0
Output
0
Normal
0
1
RGB No. 1
0
1
0
RGB No. 2
0
1
High-impedance state
ROM selection when character output is specified
in QVGA mode
QRM1
QRM0
ROM selection
0
ROM1
0
1
ROM2
1
0
ROM3
1
ROM4
*: This register is set to the all bits zero state when the IC is reset by the RST pin.
When RGB No. 1 or RGB No. 2 is selected:
The A17 to 9 output is set to the RD2 to BD0 three-value output. (Supported by connecting external resistors.)
* It will not be possible to use external ROM in this case. (Only internal ROM can be used.)
No. 1: RGB = 000 = Black only. Here the output will go to the high-impedance state giving the middle level due to the external resistor.
For areas other than the display area, the output will be at the low level.
No. 2: When any individual color is zero, the output will go to the high-impedance state giving the middle level due to the external resistor.
For areas other than the display area, the output will be at the low level.
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