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參數(shù)資料
| 型號(hào)： | LC74730M |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | On-Screen Display Controller LSI |
| 中文描述： | 屏幕顯示控制器芯片 |
| 文件頁數(shù)： | 3/14頁 |
| 文件大小： | 145K |
| 代理商： | LC74730M |
Timing Characteristics
at Ta = –30 to +70°C, V
DD
1 = 5 ± 0.5 V
Pin Functions
No. 4247-3/14
LC74730M
Parameter
Symbol
Conditions
min
typ
max
Unit
Minimum input pulse width
t
W (SCLK)
t
W (CS)
t
SU (CS)
t
SU (SIN)
t
h (CS)
t
h (SIN)
t
word
t
wt
SCLK
200
ns
CS pin (during the period that CS is high)
1
μs
Data setup time
CS
200
ns
SIN
200
ns
Data hold time
CS
2
μs
SIN
200
ns
One word write time
The 8-bit data write time
4.2
μs
The RAM data write time
1
μs
Pin No.
Symbol
Function
Description
1
V
SS
1
Xtal
IN
Xtal
OUT
Ground
Ground connection
2
Crystal oscillator element
connection
Used to connect the external crystal and capacitors for the crystal oscillator that generates
the internal synchronizing signal. Also used for an external clock input. (2f
sc
: 7.159 MHz)
Switches between the external 2f
sc
clock input mode and the crystal resonator driving mode.
Low: crystal oscillator, high: external clock input
3
4
CTRL1
Crystal oscillator input
switching
5
CSYN
OUT
Composite synchronizing
signal output
Outputs the composite synchronizing signal. Outputs the crystal oscillator clock on a reset due
to a low level on the RST pin. Does not output any signal on a command reset.
6
OSC
IN
OSC
OUT
LC oscillator
Connections for the coil and capacitor that form the oscillator that generates the character
output dot clock.
7
External synchronizing signal
state judgment output
Outputs the judgment as to whether or not an external synchronizing signal is present. Outputs
a high level when a synchronizing signal is present. Outputs the dot clock (LC oscillator) on a
reset due to a low level on the RST pin. Does not output any signal on a command reset.
8
SYNC
JDG
9
CS
Enable input
Enable input for serial data input. Serial data input is enabled by a low level. A pull-up resistor is
built in. (This input has hysteresis characteristics.)
10
SCLK
Clock input
Serial data input clock input. A pull-up resistor is built in. (This input has hysteresis characteristics.)
11
SIN
Data input
Serial data input. A pull-up resistor is built in. (This input has hysteresis characteristics.)
12
V
DD
2
C
OUT
NC
Power supply
Video signal level adjustment power supply. (Analog system power supply)
13
Color signal output
Color (C) signal output
14
This pin must be level open or connected to ground.
15
C
IN
CBIAS
Color signal input
Color (C) signal input
16
Chrominance bias output
Chrominance signal bias level output
17
Y
OUT
NC
Luminance signal output
Luminance signal (Y) output
18
This pin must be level open or connected to ground.
19
Y
IN
Luminance signal input
Luminance signal (Y) input
20
CTRL2
NTSC/PAL-M switching input
Switches the synchronizing signal generator between NTSC and PAL-M formats. Low: NTSC,
high: PAL-M
21
CV
OUT
NC
Composite video signal output
Outputs a composite video signal.
22
This pin must be level open or connected to ground.
23
CV
IN
Composite video signal input
Inputs a composite video signal.
24
CTRL3
SEP
IN
input control
Controls whether the VSYNC signal is input to the SEP
IN
input. Low: VSYNC is input,
high: VSYNC is not input.
25
SYN
IN
Sync separator circuit input
Video signal input to the built-in sync separator circuit. (Input either a horizontal or composite
synchronizing signal to this pin if the built-in sync separator circuit is not used.)
26
SEP
C
Sync separator circuit
adjustment
Adjusts the built-in sync separator circuit. (Connect a capacitor to this pin.)
(Leave this pin open if the built-in sync separator circuit is not used.)
27
SEP
OUT
Composite synchronizing
signal output
Outputs the built-in sync separator circuit composite synchronizing signal.
(Outputs the SYN
IN
input signal if the built-in sync separator circuit is not used.)
Integrates the SEP
OUT
output signal and inputs a vertical synchronizing signal.
An integration circuit must be connected between this pin and the SEP
OUT
pin. This pin must
be tied to V
DD
1 if it is not used.
The system reset input. A pull-up resistor is built in. (This input has hysteresis characteristics.)
Vertical synchronizing
signal input
28
SEP
IN
29
RST
Reset input
30
V
DD
1
Power supply (+5 V)
Power supply (+5 V: digital system power supply)
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相關(guān)代理商/技術(shù)參數(shù) |
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| LC74731 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller |
| LC74731W | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller |
| LC74731W_11 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:On-Screen Display Controller |
| LC74731W-9818-E | 功能描述:顯示驅(qū)動(dòng)器和控制器 RoHS:否 制造商:Panasonic Electronic Components 工作電源電壓:2.7 V to 5.5 V 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Reel |
| LC74731WS-9818-E | 功能描述:顯示驅(qū)動(dòng)器和控制器 RoHS:否 制造商:Panasonic Electronic Components 工作電源電壓:2.7 V to 5.5 V 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Reel |
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