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參數(shù)資料
| 型號(hào)： | LC7471 |
| 元件分類(lèi)： | 畫(huà)面疊加 |
| 英文描述： | ON-SCREEN DISPLAY IC, PDIP22 |
| 封裝： | SHRINK, DIP-22 |
| 文件頁(yè)數(shù)： | 9/12頁(yè) |
| 文件大?。?/td> | 134K |
| 代理商： | LC7471 |
LC7471
No.4088–6/12
Vertical Display Control Register (0BDH)
The function of each bit in the vertical display control register is shown in the following table. Note that a LOW-level
pulse on RST resets all bits to 0.
Table 4. Line 1 pixel height
Table 5. Line 2 pixel height
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4
Table 6. Line 3 to line 12 pixel height
1
3
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3
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/
H
4
The relationships between the vertical sync and horizon-
tal sync pulses and between the horizontal and vertical
display start positions are shown in the following figure.
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