參數(shù)資料
型號: LC7454A
廠商: Sanyo Electric Co.,Ltd.
英文描述: CMOS Data Slicer(CMOS 數(shù)據(jù)切波器)
中文描述: CMOS數(shù)據(jù)切片(的CMOS數(shù)據(jù)切波器)
文件頁數(shù): 7/16頁
文件大?。?/td> 696K
代理商: LC7454A
LC7454A/M
7/16
3. Electrical Characteristics at Ta=-30
°
C to +70
°
C, VSS=0V
Ratings
typ.
Parameter
Symbol
Pins
Conditions
VDD[V]
4.5 to 5.5
min.
max.
1
unit
‘H’ level input
current
‘L’ level input
current
‘H’ level
output voltage
IIH
HS
/CFIN, DATA,
SCKIN,
CE
, IOC
HS
/CFIN, DATA,
SCKIN,
CE
, IOC
LN26, SLICE,
O/ E /CFOUT,
HS
/CFIN
LN26, DATA,
O/ E /CFIN,
HS
/CFIN, SLICE
CVIN
VIN=VDD
IIL
VIN=VSS
4.5 to 5.5
-1
μ
A
VOH
IOH=-4mA
4.5 to 5.5 VDD-1.2
‘L’ level
output voltage
VOL
IOL=10mA
4.5 to 5.5
1
Input clamp
voltage
Clamp input
current
Clamp output
current
Power
dissipation
4. Serial Input/Output Characteristics at Ta=-30
°
C to +70
°
C, VSS=0V
VCLM
P
CII
5.0
2.3
2.5
2.7
V
CVIN
CVIN=3V
5.0
5
10
18
COI
CVIN
CVIN=2V
5.0
-120
-70
-30
μ
A
IDD
VDD1,VDD2
4.5 to 5.5
8
20
mA
Ratings
typ.
Parameter
Symbol
Pins
Conditions
VDD[V]
4.5 to 5.5
4.5 to 5.5
min.
1
0.5
max.
unit
Cycle
‘L’ Level
pulse width
‘H’ Level
pulse width
t
CKCY
t
CKL
SCKIN
SCKIN
Refer to figure 3
Refer to figure 3
I
t
CKH
SCKIN
Refer to figure 3
4.5 to 5.5
0.5
S
Set up time
t
ICK
SCKIN
Applied to
CE
falling edge.
Refer to figure 3
Applied to SCKIN
rising edge.
Refer to figure 3
Applied to SCKIN
falling edge.
Use external 1k
pull-up resister.
Refer to figure 3
4.5 to 5.5
1
Data set up time
t
IDO
4.5 to 5.5
0.1
S
Data hold time
t
HDO
DATA
4.5 to 5.5
0.1
S
Output delay
t
ODT
DATA
4.5 to 5.5
0.5
μ
s
Table 1. Ceramic resonator constants
Type of oscillation
503kHz
ceramic
oscillation
* Both C1 and C2 must be use K rank (±10%) and SL characteristics.
(Notes) Please place the oscillation-related parts as close to the oscillation pins as possible with the shortest
possible pattern length since the circuit pattern affects the oscillation frequency.
If you use other oscillators herein, we provide no guarantee for the characteristics.
Maker
Murata
Resonator
CSB 503E9
C1
150pF
C2
150pF
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