No. 6037-5/8
LC72723, LC72723M
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Input resistance
Rmpxin
MPXIN-Vssa: f = 57 KHz
23
K
K
M
KHz
Rcin
CIN-Vssa: f = 57 KHz
100
Internal feedback resistance
Rf
XIN
1.0
Center frequency
fc
FLOUT
56.5
57.0
57.5
–3dB bandwidth
BW–3dB
FLOUT
2.5
3.0
3.5
KHz
Gain
Gain
MPXIN-FLOUT: f = 57 KHz
FLOUT:
f = ±7 KHz
FLOUT: f < 45 KHz, f > 70 KHz
28
31
34
dB
Att1
30
dB
Stop band attenuation
Att2
40
dB
Att3
FLOUT: f < 20 KHz
50
dB
Reference voltage output
Vref
Vref: Vdda = 5 V
2.5
V
Hysteresis
V
HIS
V
OL1
V
OL2
V
OH
I
IH
1
I
IH
2
I
IL
1
I
IL
2
I
OFF
Idd
TEST, MODE, RST, RDCL
0.1 Vddd
V
Low-level output voltage
RDDA, RDCL : I = 2 mA
0.4
V
RDS-ID (READY): I = 8 mA
0.4
V
High-level output voltage
RDDA, RDCL : I = 2 mA
Vddd – 0.4
V
High-level input current
TEST, MODE, RST, RDCL : V
I
= 6.5 V
XIN: V
I
= Vddd
TEST, MODE, RST, RDCL : V
I
= 0 V
XIN: V
I
= 0 V
RDS-ID (READY): V
O
= 6.5 V
Vddd + Vdda
5.0
μA
2.0
11
μA
Low-level input current
5.0
μA
2.0
11
μA
Output off leakage current
5.0
μA
Current drain
8
mA
Electrical Characteristics
at Ta = –40 to +85°C, Vssd = Vssa = 0 V, Vddd = Vdda
Inputs and Outputs
Note: The RDS-ID (READY) pin is an n-channel open-drain output, and data is read out by connecting a pull-up resistor.
TEST
MODE
Circuit operating mode
RDCL pin
RDS-ID/READY pin
0
0
Master mode
Clock output
RDS-ID output
0
1
Slave mode
Clock input
READY output
1
0
Standby mode (crystal oscillator stopped)
—
—
1
1
IC test mode (Cannot be set by users.)
—
—
RST pin
RST = 0
Normal operation
RST = 1
The RDS-ID and demodulation circuits are cleared, and (in slave mode) the READY state and memory are cleared.
RDS ID/READY pin
Master mode RDS-ID output (active low)
Slave mode
Readout data ready output (active low)