參數(shù)資料
型號: LC72722
廠商: Sanyo Electric Co.,Ltd.
英文描述: Single-Chip RDS Signal-Processing System LSI
中文描述: 單芯片發(fā)展策略的信號處理系統(tǒng)LSI
文件頁數(shù): 5/15頁
文件大?。?/td> 114K
代理商: LC72722
No. 5602-5/15
LC72722, 72722M, 72722PM
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Att1
FLOUT :
f = ±7 kHz
FLOUT : f < 45 kHz, f > 70 kHz
30
dB
Stop band attenuation
Att2
40
dB
Att3
FLOUT : f < 20 kHz
50
dB
pull-up resistor used.Reference voltage output
Vref
VREF : Vdda = 5 V
2.5
V
Hysteresis
V
HIS
V
OL
1
V
OL
2
I
IH
1
I
IH
2
I
IL
1
I
IL
2
CL, DI, CE, SYR, T1, T2
0.1 Vddd
V
Output low-level voltage
DO, T3, T4, T5, T6, T7 : I = 2 mA
0.4
V
SYNC, RDS-ID : I = 8 mA
0.4
V
Input high-level current
CL, DI, CE, SYR, T1, T2 : V
I
= 6.5 V
XIN : V
I
= Vddd
CL, DI, CE, SYR, T1, T2 : V
I
= 0 V
XIN : V
I
= 0 V
DO, SYNC, RDS-ID, T3, T4, T5, T6, T7 :
V
O
= 6.5 V
Vddd + Vdda
5.0
μA
2.0
11
μA
Input low-level current
5.0
μA
2.0
11
μA
Output off leakage current
I
OFF
5.0
μA
Current drain
Idd
9
mA
Continued from preceding page.
CCB Output Data Format
Each block of output data consists of 32 bits (4 bytes), of which 2 bytes are RDS data and 2 bytes are flag data.
Any number of 32-bit output data blocks can be output consecutively.
When there is no data that can be read out in the internal memory, the system outputs blocks of all-zero data
consecutively.
If data readout is interrupted, the next read operation starts with the 32-bit data block whose readout was interrupted.
However, if only the last bit remains to be read, it will not be possible to reread that whole block.
The check bits (10 bits) are not output.
The data valid/invalid decision is made by referencing the error information flags (E0 to E2) must not be referred to.
When the first leading bits are not "1010", the read in data is invalid, and the read operation is cancelled.
1. Offset word detection flag (1 bit): OWD
OWD
Offset word detection
1
Detected
0
Not detected (protection function operating)
DI
DO
B
0
0
1
0
1
0
O
W
D
R
F
1
R
F
0
A
R
I
S
Y
C
D
1
5
D
1
4
D
1
3
D
1
2
D
1
1
D
1
0
B
2
E
2
E
1
E
0
D
9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
B
1
B
0
R
E
0
1
1
0
1
1
0
B
1
B
2
B
3
A
0
A
1
A
2
A
3
CCB address 6C
Output data/first bit
Last bit
(8) RDS data
(7) Error information flags
(6) Synchronization established flag
(5) ARI (SK) detection flag
(4) RAM data remaining flag
(3) Consecutive RAM read out possible flag
(2) Offset word information flag
(1) Offset word detection flag
Fixed pattern (1010)
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