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參數(shù)資料
| 型號(hào)： | LC72708E |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | FM Multiplex Broadcast Reception IC for Mobile VICS Systems(用于移動(dòng)VICS系統(tǒng)的FM多路廣播接收芯片) |
| 中文描述： | 調(diào)頻廣播接收集成電路多重移動(dòng)VICS系統(tǒng)（用于移動(dòng)VICS系統(tǒng)的調(diào)頻多路廣播接收芯片） |
| 文件頁(yè)數(shù)： | 9/15頁(yè) |
| 文件大小： | 159K |
| 代理商： | LC72708E |
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Structure of the Output Data
The output data consists of a total of 288 bits (36 bytes). The first two bytes are status information, and data is output
in a single data block unit.
CNT1 and CNT2 are output LSB first.
The corrected data is output starting with the first bit in the data block.
BIC codes are not output.
Note: The CPU can easily select data by discriminating the status information at first during data readout. Data that is
determined to be unnecessary can be immediately cancelled without reading it out. (The CPU can simply ignore
the data until the next interrupt arrives.)
For example, the CPU can also read out just the first 22 bytes (the data block section) of the corrected data, and
does not have to read out the unrequired 12 bytes (the layer 2 CRC and parity data).
Notes:
CRC indicates the layer 2 CRC check when the ERR flag is 1.
The CRC4 result is the data immediately preceding the point when the CCB output address (#FB) was input and CE
was high.
The HEAD flag is valid only for horizontal correction data output, i.e. when VH is 0.
See page 10 for details on VH blanking in the horizontal and vertical directions.
BLN0 to BLN7:
Indicates either the block number for the output data or the parity block number. The data blocks in
a single frame are numbered 0 to 189, and the parity blocks are numbered 0 to 81.
Parity block data is not output for post-vertical correction output.
No. 5875-9/15
LC72708E
Layer 4 CRC shift register: Not all zeros.
Layer 4 CRC shift register: All zeros (no errors)
Data for the first block is being output (block No.0)
Data block data
Parity block data
Error correction and layer 2 CRC check OK
Either an uncorrectable error or the NG layer 2 CRC check
Indicates data received with frame synchronization not achieved
Indicates data received with frame synchronization achieved
Indicates data received with block synchronization not achieved
Indicates data received with block synchronization achieved
Output with horizontal correction only
Output with horizontal and vertical corrections
CNT1
CNT2
CNT1 (8 bits) CNT2 (8 bits)
Corrected data 176 bits
CRC (14 bits)
Parity (82 bits)
相關(guān)PDF資料 |
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| LC72709E | FM Multiplex Reception IC for Mobile Systems(用于移動(dòng)系統(tǒng)的FM多路廣播接收芯片) |
| LC72710LW | Mobile FM Multiplex Broadcast (DARC) Receiver IC with On-Chip VICS Decoder(移動(dòng)FM多路廣播接收器芯片帶片上VICS譯碼器) |
| LC72711LW | Mobile FM Multiplex Broadcast (DARC) Receiver IC(移動(dòng)FM多路廣播接收器芯片) |
| LC72714 | Mobile FM Multiplex Broadcast IC with On-Chip VICS Decoder |
| LC72714W | Mobile FM Multiplex Broadcast IC with On-Chip VICS Decoder |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC72709 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:FM Multiplex Reception IC for Mobile Systems |
| LC72709E | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:FM Multiplex Reception IC for Mobile Systems |
| LC72709W | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:FM Multiplex Reception IC for Mobile Systems |
| LC72710 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Mobile FM Multiplex Broadcast DARC Receiver IC with On-Chip VICS Decoder |
| LC72710LW | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Mobile FM Multiplex Broadcast DARC Receiver IC with On-Chip VICS Decoder |
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