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參數(shù)資料
| 型號： | LC72706E |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | FM Multiplex Receiver IC Supporting All Worldwide Standards(適用于全球統(tǒng)一標(biāo)準(zhǔn)的FM多路接收器芯片) |
| 中文描述： | 多重調(diào)頻接收芯片支持所有全球標(biāo)準(zhǔn)（適用于全球統(tǒng)一標(biāo)準(zhǔn)的調(diào)頻多路接收器芯片） |
| 文件頁數(shù)： | 9/15頁 |
| 文件大?。?/td> | 164K |
| 代理商： | LC72706E |
Structure of the Output Data
The output data consists of a total of 288 bits (36 bytes). The first two bytes are status information, and data is output
in a single data block unit.
CNT1 and CNT2 are output LSB first.
The corrected data is output starting with the first bit in the data block.
BIC codes are not output.
Note: The CPU can easily select data by discriminating the status information at first during data readout. Data that is
determined to be unnecessary can be immediately cancelled without reading it out. (The CPU can simply ignore
the data until the next interrupt arrives.)
For example, the CPU can also read out just the first 22 bytes (the data block section) of the corrected data, and
does not have to read out the unrequired 12 bytes (the layer 2 CRC and parity data).
Notes:
CRC indicates the layer 2 CRC check when the ERR flag is 1.
The CRC4 result is the data immediately preceding the point when the CCB output address (#FB) was input and CE
was high.
The HEAD flag is only valid for horizontal correction data output, i.e. when VH is 0.
The RTIB flag is only valid for method A.
BLNK0 to BLNK7: Indicates either the block number for the output data or the parity block number. The data blocks in
a single frame are numbered 0 to 189, and the parity blocks are numbered 0 to 81.
Parity block data is not output for post-vertical correction output.
No. 5745-9/15
LC72706E
288 bits (36 bytes)
Parity
8 bits
8 bits
Indicates the presence of real-time information blocks
Layer 4 CRC shift register: Not all zeros.
Layer 4 CRC shift register: All zeros (no errors)
Data for the first block is being output
Normal block data
Parity block data
Error correction and CRC check OK
Either an uncorrectable error or the NG CRC check
Indicates data received with frame synchronization not achieved
Indicates data received with frame synchronization achieved
Indicates data received with block synchronization not achieved
Indicates data received with block synchronization achieved
Output with horizontal correction only
Output after vertical correction
Corrected data 176 bits
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相關(guān)代理商/技術(shù)參數(shù) |
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| LC72707 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:FM Multiplex Receiver IC Supporting All Worldwide Standards |
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| LC72708 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:FM Multiplex Broadcast Reception IC for Mobile VICS Systems |
| LC72708E | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:FM Multiplex Broadcast Reception IC for Mobile VICS Systems |
| LC72709 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:FM Multiplex Reception IC for Mobile Systems |
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