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參數(shù)資料
| 型號(hào)： | LC723341E |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 14 X 14 MM, 0.80 MM PITCH, QIP-64 |
| 文件頁數(shù)： | 10/11頁 |
| 文件大?。?/td> | 114K |
| 代理商： | LC723341E |
LC723341E
No.8013-8/11
Pin Functions
Pin No.
Symbol
I/O
Description
Equivalent circuit
64
1
XIN
XOUT
I
O
4.5 MHz crystal oscillator circuit connections
2
TEST1
I
IC test pin
This pin must be connected to ground during normal operation.
6
5
4
3
PA0
PA1
PA2
PA3
I
These input ports are used as the key return ports and are designed with a low threshold
voltage. When a key matrix is formed with the PB port, multiple key presses with up to 3
keys can be detected. The four pull-down resistors are enabled/disabled together with an
IOS instruction (PWn = 2, b1). The pull-down resistors cannot be controlled individually.
In backup mode, this port goes to the input disabled state, and the pull-down resistors will be
in the disabled state after a reset.
Input with built-in pull-down
resistor
10
9
8
7
PB0
PB1
PB2
PB3
O
These output ports are used as the key source ports and can be set up to be either
unbalanced outputs or open-drain outputs. The output type is set with an IOS instruction
(PWn = 2, b0, b2, b3). When used set to the unbalanced output circuit type, diodes to
prevent short circuits due to multiple key presses are not required. If used set to the
open-drain output circuit type, pull-up resistors between VDD and the port pins are required.
In backup mode, this port goes to the output high-impedance state. After a reset, this port
will be in the output high-impedance state, and will remain in that state until an output
instruction (an OUT, SPB, or RPB instruction) is executed.
*: Note that the output impedance requires care if these pins are used for any purpose
other than as key source outputs.
Unbalanced CMOS push-pull
or
n-channel open-drain output
15
14
13
12
PC0
PC1
PC2
PC3
I/O
General-purpose I/O ports. *1
The IOS instruction (PWN = 4) is used to switch between the general-purpose input and
output port functions. The I/O direction can be set in 1-bit units. (0: input, 1: output)
In backup mode, this port goes to the input disabled high-impedance state.
After a reset, the general-purpose input port function will be selected.
CMOS push-pull circuit
18
17
16
15
PD0/INT0
PD1/INT1
PD2
PD3
I/O
General-purpose I/O ports. *1
The IOS instruction (PWN = 5, b0, b1) is used to switch between the general-purpose input
and output port functions. The I/O direction can be set in 1-bit units. (0: input, 1: output)
Two of these port pins can be used as external interrupt inputs. In that case, the I/O direction
must be set to input, and rising or falling edge detection must be selected with an IOS
instruction (PWN = 3, b0, b1).
In backup mode, this port goes to the input disabled high-impedance state.
After a reset, the general-purpose input port function will be selected.
CMOS push-pull circuit
Note:
1 When ports that can be switched between input and output are used as output ports, the output data must be established in advance with an OUT,
SPB, or RPB instruction before the port is set to output mode with an IOS instruction.
Continued on next page.
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