參數(shù)資料
型號: LC7218JM
廠商: Sanyo Electric Co.,Ltd.
英文描述: PLL Frequency Synthesizer for Electronic Tuning in AV Systems
中文描述: 鎖相環(huán)頻率合成器的AV系統(tǒng)的電子調(diào)諧
文件頁數(shù): 5/16頁
文件大?。?/td> 265K
代理商: LC7218JM
Electrical Characteristics
for the Allowable Operating Ranges
Note: A capacitor of at least 2000 pF must be inserted between the power supply V
DD
and V
SS
potentials.
No. 4758-5/16
LC7218, 7218M, 7218JM
Parameter
Symbol
Conditions
min
typ
max
Unit
M
k
k
k
k
V
Rf (1)
XIN
1.0
Rf (2)
FMIN
500
Internal feedback resistance
Rf (3)
AMIN
500
Rf (4)
HCTR
500
Rf (5)
LCTR
500
Hysteresis
V
H
LCTR
0.1 V
DD
0.6 V
DD
I
IH
(1)
I
IH
(2)
I
IH
(3)
I
IH
(4)
I
IH
(5)
I
IL
(1)
I
IL
(2)
I
IL
(3)
I
IL
(4)
I
IL
(5)
V
OH
(1)
V
OH
(2)
V
OL
(1)
V
OL
(2)
V
OL
(3)
V
OL
(4)
V
OL
(5)
V
OL
(6)
I
OFF
(1)
I
OFF
(2)
I
OFF
(3)
CE, CL, DI: V
I
= 6.5 V
IN0, IN1: V
I
= V
DD
XIN: V
I
= V
DD
FMIN, AMIN: V
I
= V
DD
HCTR, LCTR: V
I
= V
DD
CE, CL, DI: V
I
= V
SS
IN0, IN1: V
I
= V
SS
XIN: V
I
= V
SS
FMIN, AMIN: V
I
= V
SS
HCTR, LCTR: V
I
= V
SS
OUT1, OUT2: I
O
= –1 mA
PD1, PD2: I
O
= –0.5 mA
OUT1, OUT2: I
O
= 1 mA
PD1, PD2: I
O
= 0.5 mA
OUT3 to OUT6: I
O
= 5 mA
OUT0: I
O
= 1 mA
DO: I
O
= 5 mA
SYC: I
O
= 0.5 mA (V
DD
= 3.5 to 6.5 V)
OUT3 to OUT6, OUT0: V
O
= 13 V
DO: V
O
= 6.5 V
SYC: V
O
= 6.5 V (V
DD
= 3.5 to 6.5 V)
5.0
μA
5.0
μA
Input high level current
20
μA
40
μA
40
μA
5.0
μA
5.0
μA
Input low level current
20
μA
40
μA
40
μA
Output high level voltage
V
DD
– 1.0
V
DD
– 1.0
V
V
1.0
V
1.0
V
Output low level voltage
1.0
V
1.0
V
1.0
V
1.0
V
5.0
μA
Output off leakage current
5.0
μA
5.0
μA
Three-state high level
off leakage current
I
OFFH
PD1, PD2: V
O
= V
DD
0.01
10.0
nA
Three-state low level
off leakage current
I
OFFL
PD1, PD2: V
O
= V
SS
0.01
10.0
nA
Input capacitance
C
IN
FMIN, HCTR
1
2
3
pF
V
DD
: f
IN
(2) = 130 MHz, V
IN
(2) = 70 mVrms,
with a 7.2 MHz crystal, other input pins at V
SS
,
output pins open
I
DD
(1)
20
30
mA
Current drain
V
DD
: PLL block stopped (PLL inhibit state), crystal
oscillator operating (SYC, TB), with a 7.2 MHz crystal,
other input pins at V
SS
, output pins open
I
DD
(2)
1.0
mA
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