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參數(shù)資料
| 型號： | LC72133M |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | PLL Frequency Synthesizer for Electronic Tuning(用于電子調(diào)諧的鎖相環(huán)頻率合成器) |
| 中文描述： | 鎖相環(huán)頻率合成器電子調(diào)諧（用于電子調(diào)諧的鎖相環(huán)頻率合成器） |
| 文件頁數(shù)： | 10/23頁 |
| 文件大?。?/td> | 147K |
| 代理商： | LC72133M |
2. DI Control Data Functions
No. 5427-10/23
LC72133M, 72133V
No.
Control block/data
Functions
Related data
Programmable divider data Data that sets the programmable divider.
P0 to P15
A binary value in which P15 is the MSB. The LSB changes depending on
DVS and SNS. (
*
: don’t care)
Note: P0 to P3 are ignored when P4 is the LSB.
DVS, SNS
Selects the signal input pin (AMIN or FMIN) for the programmable divider, switches
the input frequency range. (
*
: don’t care)
Note: See the “Programmable Divider” item for more information.
Reference divider data
R0 to R3
Reference frequency (fref) selection data.
Note: PLL INHIBIT
The programmable divider block and the IF counter block are stopped, the FMIN,
AMIN, and IFIN pins are set to the pull-down state (ground), and the charge pump
goes to the high impedance state.
XS
Crystal resonator selection
XS = 0: 4.5 MHz
XS = 1: 7.2 MHz
The 7.2 MHz frequency is selected after the power-on reset.
IF counter control data
CTE
IF counter measurement start data
CTE = 1: Counter start
CTE = 0: Counter reset
GT0, GT1
Determines the IF counter measurement period.
IFS
Note: See the “IF Counter” item for more information.
I/O port specification data
IOC1, IOC2
Specifies the I/O direction for the bidirectional pins IO1 and IO2.
Data: 0 = input mode, 1 = output mode
Output port data
BO1 to BO4, IO1, IO2
Data that determines the output from the BO1 to BO4, IO1 and IO2 output ports
Data: 0 = open, 1 = low
The data = 0 (open) state is selected after the power-on reset.
(1)
(2)
(3)
(4)
(5)
IOC1
IOC2
DVS
SNS
LSB
Divisor setting (N)
Actual divisor
1
*
P0
272 to 65535
Twice the value of the setting
0
1
P0
272 to 65535
The value of the setting
0
0
P4
4 to 4095
The value of the setting
DVS
SNS
Input pin
Input frequency range
1
*
FMIN
10 to 130 MHz
0
1
AMIN
2 to 40 MHz
0
0
AMIN
0.5 to 10 MHz
GT1
GT0
Measurement time (ms)
Wait time (ms)
0
0
4
3 to 4
0
1
8
3 to 4
1
0
32
7 to 8
1
1
64
7 to 8
R3
R2
R1
R0
Reference frequency (kHz)
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
100
50
25
25
12.5
6.25
3.125
3.125
1
1
1
1
0
0
0
0
0
0
1
1
0
1
0
1
10
9
5
1
1
1
1
1
0
0
0
1
3
15
1
1
1
0
PLL INHIBIT + Xtal OSC STOP
1
1
1
1
PLL INHIBIT
Continued on next page.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LC72133M_11 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer for Electronic Tuning |
| LC72133V | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer for Electronic Tuning |
| LC72133V-TLM-E | 制造商:ON Semiconductor 功能描述:PLL FREQUENCY SYNTHESIZER - Tape and Reel |
| LC72134M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Dual PLL Frequency Synthesizer for FM Tuner Systems |
| LC72135M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer for Electronic Tuning |
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