Lattice Semiconductor
ispMACH 4000V/B/C Family Data Sheet
23
ispMACH 4000V/B/C Internal Timing Parameters (Cont.)
Over Recommended Operating Conditions
Parameter
In/Out Delays
t
IN
t
GOE
t
GCLK_IN
t
BUF
t
EN
t
DIS
Routing/GLB Delays
t
ROUTE
t
MCELL
t
INREG
t
FBK
t
PDb
t
PDi
Register/Latch Delays
t
S
t
S_PT
t
ST
t
ST_PT
t
H
t
HT
t
SIR
t
SIR_PT
t
HIR
t
HIR_PT
t
COi
t
CES
t
CEH
t
SL
t
SL_PT
t
HL
t
GOi
t
PDLi
Description
-5
-75
-10
1
Units
Min.
Max.
Min.
Max.
Min.
Max.
Input Buffer Delay
Global OE Pin Delay
Global Clock Input Buffer Delay
Delay through Output Buffer
Output Enable Time
Output Disable Time
—
—
—
—
—
—
0.95
4.04
1.83
1.00
0.96
0.96
—
—
—
—
—
—
1.50
6.04
2.28
1.50
0.96
0.96
—
—
—
—
—
—
2.00
7.04
3.28
1.50
0.96
0.96
ns
ns
ns
ns
ns
ns
Delay through GRP
Macrocell Delay
Input Buffer to Macrocell Register Delay
Internal Feedback Delay
5-PT Bypass Propagation Delay
Macrocell Propagation Delay
—
—
—
—
—
—
1.51
1.05
0.56
0.00
1.54
0.94
—
—
—
—
—
—
2.26
1.45
0.96
0.00
2.24
1.24
—
—
—
—
—
—
3.26
1.95
1.46
0.00
3.24
1.74
ns
ns
ns
ns
ns
ns
D-Register Setup Time (Global Clock)
D-Register Setup Time (Product Term Clock)
T-Register Setup Time (Global Clock)
T-Register Setup Time (Product Term Clock)
D-Register Hold Time
T-Register Hold Time
D-Input Register Setup Time (Global Clock)
D-Input Register Setup Time (Product Term Clock)
D-Input Register Hold Time (Global Clock)
D-Input Register Hold Time (Product Term Clock)
Register Clock to Output/Feedback MUX Time
Clock Enable Setup Time
Clock Enable Hold Time
Latch Setup Time (Global Clock)
Latch Setup Time (Product Term Clock)
Latch Hold Time
Latch Gate to Output/Feedback MUX Time
Propagation Delay through Transparent Latch to Output/
Feedback MUX
Asynchronous Reset or Set to Output/Feedback MUX
Delay
Asynchronous Reset or Set Recovery Delay
Control Delays
t
BCLK
GLB PT Clock Delay
t
PTCLK
Macrocell PT Clock Delay
t
BSR
GLB PT Set/Reset Delay
t
PTSR
Macrocell PT Set/Reset Delay
1.32
1.32
1.52
1.32
1.68
1.68
1.52
1.45
0.68
0.68
—
2.25
1.88
1.32
1.32
1.17
—
—
—
—
—
—
—
—
—
—
—
—
0.52
—
—
—
—
—
0.33
0.25
1.57
1.32
1.77
1.32
2.93
2.93
1.57
1.45
1.18
1.18
—
2.25
1.88
1.57
1.32
1.17
—
—
—
—
—
—
—
—
—
—
—
—
0.67
—
—
—
—
—
0.33
0.25
1.57
1.32
1.77
1.32
3.93
3.93
1.57
1.45
1.18
1.18
—
2.25
1.88
1.57
1.32
1.17
—
—
—
—
—
—
—
—
—
—
—
—
1.17
—
—
—
—
—
0.33
0.25
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
SRi
—
0.28
—
0.28
—
0.28
ns
t
SRR
—
1.67
—
1.67
—
1.67
ns
—
—
—
—
1.12
0.87
1.83
2.51
—
—
—
—
1.12
0.87
1.83
3.41
—
—
—
—
0.62
0.87
1.83
3.41
ns
ns
ns
ns