參數(shù)資料
型號: LC4256B-75F256BC
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
中文描述: EE PLD, 7.5 ns, PBGA256
封裝: FPBGA-256
文件頁數(shù): 32/74頁
文件大?。?/td> 255K
代理商: LC4256B-75F256BC
Lattice Semiconductor
ispMACH 4000V/B/C/Z Family Data Sheet
32
ispMACH 4000V/B/C Timing Adders
1
Adder
Type
Base
Parameter
Description
-25
-27
-3
-35
Units
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Optional Delay Adders
t
INDIO
t
INREG
Input register delay
Product term expander
delay
Output routing pool delay
Additional block loading
adder
0.95
1.00
1.00
1.00
ns
ns
t
EXP
t
MCELL
0.33
0.33
0.33
0.33
t
ORP
0.05
0.05
0.05
0.05
0.05
0.05
0.05
ns
ns
t
BLA
t
ROUTE
0.03
t
IOI
Input Adjusters
LVTTL_in
t
IN
, t
GCLK_IN
,
t
GOE
t
IN
, t
GCLK_IN
,
t
GOE
t
IN
, t
GCLK_IN
,
t
GOE
t
IN
, t
GCLK_IN
,
t
GOE
t
IN
, t
GCLK_IN
,
t
GOE
Using LVTTL standard
0.60
0.60
0.60
0.60
ns
LVCMOS33_in
Using LVCMOS 3.3
standard
Using LVCMOS 2.5
standard
Using LVCMOS 1.8
standard
Using PCI compatible
input
0.60
0.60
0.60
0.60
ns
LVCMOS25_in
0.60
0.60
0.60
0.60
ns
LVCMOS18_in
0.00
0.00
0.00
0.00
ns
PCI_in
0.60
0.60
0.60
0.60
ns
t
IOO
Output Adjusters
LVTTL_out
t
BUF
, t
EN
, t
DIS
Output con
fi
gured as
TTL buffer
Output con
fi
gured as
3.3V buffer
Output con
fi
gured as
2.5V buffer
Output con
fi
gured as
1.8V buffer
Output con
fi
gured as
PCI compatible buffer
Output con
fi
gured for
slow slew rate
0.20
0.20
0.20
0.20
ns
LVCMOS33_out t
BUF
, t
EN
, t
DIS
0.20
0.20
0.20
0.20
ns
LVCMOS25_out t
BUF
, t
EN
, t
DIS
0.10
0.10
0.10
0.10
ns
LVCMOS18_out t
BUF
, t
EN
, t
DIS
0.00
0.00
0.00
0.00
ns
PCI_out
t
BUF
, t
EN
, t
DIS
0.20
0.20
0.20
0.20
ns
Slow Slew
t
BUF
, t
EN
1.00
1.00
1.00
1.00
ns
Note: Open drain timing is the same as corresponding LVCMOS timing.
1. Refer to Technical Note TN1004:
ispMACH 4000 Timing Model Design and Usage Guidelines
for information regarding use of these adders.
相關PDF資料
PDF描述
LC4256B-75F256BI 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4256C-10F256BI 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4256C-3F256BC 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4256C-5F256BC 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4256C-5F256BI 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
相關代理商/技術參數(shù)
參數(shù)描述
LC4256B-75F256BC1 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4256B-75F256BI 功能描述:CPLD - 復雜可編程邏輯器件 PROGRAMMABLE SUPER FAST HI DENSITY PLD RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
LC4256B-75F256BI1 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4256B-75FN256AC 功能描述:CPLD - 復雜可編程邏輯器件 PROGRAMMABLE SUPER FAST HI DENSITY PLD RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
LC4256B-75FN256AC1 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs