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參數(shù)資料
| 型號： | LC4102-T2A |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 68K |
| 代理商： | LC4102-T2A |
Pin Functions
No. 6790-5/8
LC4104C-T2A
Symbol
I/O
Function
O1 to O160
V0
V2
V3
V5
V
DDH
V
DD
V
SS
DISP
M
EIO1
EIO2
CP
LOAD
TEST
R/L
D0 to D7
BS
O
I
I
I
I
—
—
—
I
I
I/O
I/O
I
I
I
I
I
I
LCD drive outputs
V0 level drive voltage supply (selected level)
V2 level drive voltage supply (unselected level)
V3 level drive voltage supply (unselected level)
V5 level drive voltage supply (selected level)
High-voltage system power supply.
Logic system power supply.
GND
LCD off function. All outputs go to the V5 level when this pin is low.
Alternation signal input
Enable I/O
Enable input:
The enable input at the first stage is fixed at V
SS
. For succeeding stages, the enable input is connected to the
enable output from the preceding stage.
Enable output: Connected to the enable input of the next stage when cascode connection is used.
Data acquisition clock (falling edge)
Data load clock (falling edge)
Test input. Must be tied high in normal use.
*
Data shift direction setting
Parallel data inputs
Input bus setting. Set high for 8-bit input, low for 4-bit input. For 4-bit input, D0 to D3 are used for data input and D4 to D7 must
be tied to ground.
*
: Don’t care.
M
Data
DISP
On
H
H
H
V0
H
L
H
V2
L
L
H
V3
L
H
H
V5
*
*
L
V5
R/L
EIO1
EIO2
L
In
Out
H
Out
In
R/L
BS
O1 to O160 outputs
→
. . .
↑
D4
. . .
←
↑
D3
→
. . .
↑
D0
. . .
←
↑
D3
O1
↑
D7
O2
↑
D6
O3
↑
D5
O4
O157
↑
D3
O158
↑
D2
O159
↑
D1
O160
↑
D0
L
H
O1
↑
D0
O2
↑
D1
O3
↑
D2
O4
O157
↑
D4
O158
↑
D5
O159
↑
D6
O160
↑
D7
H
O1
↑
D3
O2
↑
D2
O3
↑
D1
O4
O157
↑
D3
O158
↑
D2
O159
↑
D1
O160
↑
D0
L
L
O1
↑
D0
O2
↑
D1
O3
↑
D2
O4
O157
↑
D0
O158
↑
D1
O159
↑
D2
O160
↑
D3
H
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