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參數(shù)資料
| 型號： | LC35W256EM-10W |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | 256K (32K words x 8 bits) SRAM Control pins: OE and CE |
| 中文描述： | 256K（32K字× 8位）的SRAM控制引腳：OE和行政長官 |
| 文件頁數(shù)： | 6/6頁 |
| 文件大小： | 46K |
| 代理商： | LC35W256EM-10W |
PS No. 6304-6/6
LC35W256EM, ET-10W
This catalog provides information as of Januarly, 2000. Specifications and information herein are subject
to change without notice.
Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer’s
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer’s products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO products (including technical data, services) described or contained
herein are controlled under any of applicable local export control laws and regulations, such products must
not be exported without obtaining the export license from the authorities concerned in accordance with the
above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification”
for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.
Notes:1. WE must be held at the high level during the read cycle.
2. Do not apply reverse phase signals to the DOUT pins when those pins are in the output state.
3. The time t
WP
is the period when both CE and WE are low. It is defined as the time from the fall of WE to the rise of CE or WE, whichever occurs
first.
4. The time t
CW
is the period when both CE and WE are low. It is defined as the time from the fall of CE to the rise of CE or WE, whichever occurs first.
5. The D
OUT
pins will be in the high-impedance state if any one of the following is held: OE is at the high level, CE is at the high level, or WE is at the
low level.
6. The OE pin must be either held high or held low during the write cycle.
7. D
OUT
has the same phase as the write data during this write cycle.
Parameter
Symbol
Conditions
min
max
Unit
Data retention supply voltage
V
DR
t
CDR
t
R
V
CE
≥
V
CC
– 0.2 V
2.0
3.6
V
Chip enable setup time
0
ns
Chip enable hold time
t
RC
*
ns
Note:
*
t
RC
: Read cycle time
Data Retention Characteristics
at Ta = –10 to +70°C
Data Retention Waveforms (CE control)
VCC
2.7 V
VIH
VDR
VCE
GND
VCE
≥
VCC – 0.2 V
tCDR
tR
Data retention mode
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