參數(shù)資料
型號： LC11014-241
廠商： Sanyo Electric Co.,Ltd.
英文描述： Computer Image Signal Processing Full-Color Gray-Scale Processor
中文描述： 計算機圖像信號處理全彩色灰度處理器
文件頁數(shù)： 7/13頁
文件大?。?/td> 534K
代理商： LC11014-241
LC11014-241
No. 5578—7/13
Switching Characteristics
at Ta = 0 to +70
°
C, V
SS
= 0V, V
DD
= 3.15 to 3.45V, C
L
= 15pF
1. Parallel input, parallel output
2. Serial input, parallel output (1H number of pixels is even)
3. Serial input, parallel output (1H number of pixels is odd)
4. Serial input, serial output
Parameter
Symbol
min
typ
max
Unit
SCLK cycle time
1
Tsclk
25
–
–
ns
SCLK cycle time
2
3
Tsclk
15.4
–
–
ns
SCLK cycle time
4
Tsclk
20
–
–
ns
SCLK high-level pulse width
1
Tschw
10
–
–
ns
SCLK high-level pulse width
2 3
Tschw
6.2
–
–
ns
SCLK high-level pulse width
4
Tschw
8
–
–
ns
SCLK low-level pulse width
1
Tsclw
10
–
–
ns
SCLK low-level pulse width
2 3
Tsclw
6.2
–
–
ns
SCLK low-level pulse width
4
Tsclw
8
–
–
ns
HSYNC low-level pulse width
Thpw
2Tsclk
–
–
ns
HSYNC high-level pulse width
Tvpw
2Tsclk
–
–
ns
CLK propagation delay time
1
Tpckh
7
11
22
ns
CLK propagation delay time
1
Tpckl
7
11
22
ns
CLKB propagation delay time
1
Tpcbh
6
10
20
ns
CLKB propagation delay time
1
Tpcbl
7
12
24
ns
CLK propagation delay time
2 3
Tpckh
7
12
24
ns
CLK propagation delay time
2 3
Tpckl
8
13
25
ns
CLKB propagation delay time
2 3
Tpcbh
7
12
23
ns
CLKB propagation delay time
2 3
Tpcbl
8
13
26
ns
CLK propagation delay time
4
Tpckh
7
11
22
ns
CLK propagation delay time
4
Tpckl
7
11
22
ns
CLKB propagation delay time
4
Tpcbh
6
10
20
ns
CLKB propagation delay time
4
Tpcbl
8
12
25
ns
Data setup time
Tdsu
5
–
–
ns
Data hold time
Tdhd
5
–
–
ns
Data output propagation delay time
1
Tpdata
8Tsclk + 9
8Tsclk + 14
8Tsclk + 28
ns
Data output propagation delay time
2 3
Tpdt0sl
16Tsclk + 9
16Tsclk + 15
16Tsclk + 29
ns
Data output propagation delay time
2 3
Tpdt1sl
15Tsclk + 9
15Tsclk + 15
15Tsclk + 30
ns
Data output propagation delay time
2 3
Tpdt0sh
15Tsclk + 9
15Tsclk + 15
15Tsclk + 29
ns
Data output propagation delay time
2 3
Tpdt1sh
16Tsclk + 9
16Tsclk + 15
16Tsclk + 30
ns
Data output propagation delay time
4
Ttdatass
16Tsclk + 9
16Tsclk + 14
16Tsclk + 27
ns
Control signal setup time
Tcsu
5
–
–
ns
Control signal hold time
Tchd
5
–
–
ns
Control signal propagation delay time
1
Tpctl
8Tsclk + 8
8Tsclk + 13
8Tsclk + 24
ns
Control signal propagation delay time
2 3 4
Tpctlsp
16Tsclk + 8
16Tsclk + 13
16Tsclk + 26
ns
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