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參數(shù)資料
| 型號： | LB11975 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | High-Speed CD-ROM Spindle Motor Driver IC |
| 中文描述： | 高速的CD - ROM主軸馬達驅(qū)動IC |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 118K |
| 代理商： | LB11975 |
No. 6497-3/12
LB11975
Continued from preceding page.
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
[PWM Oscillator]
High-level output voltage
V
O
H(OSC)
V
O
L(OSC)
V(OSC)
3.1
3.3
3.5
V
Low-level output voltage
1.4
1.6
1.8
V
Amplitude
1.5
1.7
1.9
Vp-p
Oscillator frequency
f(OSC)
C = 2200 pF
23.0
kHz
Charge current
I
CHG
R
DCHG
–110
–94
–83
μA
k
Charge resistor value
1.6
2.1
2.6
[CTL Amplifier]
VCTL pin input current
I
VCTL
I
VCREF
GDF
+
GDF
–
V
CTL
= V
CREF
= 1.65 V
V
CTL
= V
CREF
= 1.65 V
Design target value
*
–2
μA
VCREF pin input current
–2
μA
Forward rotation gain
0.20
0.25
0.30
times
Reverse rotation gain
Design target value
*
–0.30
–0.25
–0.20
times
Forward rotation limiter voltage
V
RF
1
V
RF
2
V
CTH
V
DZ
0.26
0.29
0.32
V
Reverse rotation limiter voltage
0.26
0.29
0.32
V
Startup voltage
V
CREF
= 1.65 V. Design target value
*
V
CREF
= 1.65 V. Design target value
*
1.50
1.80
V
Dead zone
35
80
140
mV
[FG Pin] (speed pulse output)
Low-level output voltage
V
FGL
R
FG
I
FG
= 2 mA
0.4
V
k
Pull-up resistor value
7.5
10
12.5
[RS Pin]
Low-level output voltage
V
RSL
R
RS
I
RS
= 2 mA
0.4
V
k
Pull-up resistor value
7.5
10
12.5
[Stop/Start Pin]
Low-level input voltage
V
SS
L
V
SS
H
I
SS
L
I
SS
H
0
0.7
V
High-level input voltage
2.0
V
CC
1
V
Low-level input current
V
SS
= 0 V
V
SS
= 5.0 V
–1
0
μA
High-level input current
50
200
μA
[Hall Device Power Supply]
Hall device supply voltage
V
H
I
H
I
H
= 5 mA
0.65
0.85
1.05
V
Allowable current
20
mA
Truth Table
Input
Control voltage V
CTL
Output
FG output
IN1
IN2
IN3
Source
→
Sink
OUT2
→
OUT1
OUT1
→
OUT2
OUT3
→
OUT1
OUT1
→
OUT3
OUT3
→
OUT2
OUT2
→
OUT3
OUT1
→
OUT2
OUT2
→
OUT1
OUT1
→
OUT3
OUT3
→
OUT1
OUT2
→
OUT3
OUT3
→
OUT2
FG1
FG2
1
H
L
H
H
L
H
L
2
H
L
L
H
L
L
L
3
H
H
L
H
L
H
L
4
L
H
L
H
H
L
L
5
L
H
H
H
H
H
L
6
L
L
H
H
H
L
L
Note:
*
These are design target values and are not tested.
FG1
FG2
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