參數(shù)資料
型號: LAN91C96I-MS
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 微控制器/微處理器
英文描述: NON-PCI SINGLE-CHIP FULL DUPLES ETHERNET CONTROLLER
中文描述: 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100
封裝: LEAD FREE, QFP-100
文件頁數(shù): 35/110頁
文件大小: 655K
代理商: LAN91C96I-MS
Non-PCI Single-Chip Full Duplex Ethernet Controller
SMSC DS – LAN91C96I
Page 35
Rev. 11/18/2004
DATASHEET
7.2
I/O Space Registers Description
7.2.1
Bank Select Register
OFFSET
NAME
TYPE
SYMBOL
# IN HEX
BANK SELECT
REGISTER
READ/WRITE
BSR
0
0
X
0
0
1
1
1
1
0
0
0
0
1
1
1
1
BS2
BS1
BS0
0
X
X
X
X
0
0
BS2, BS1, BS0 - Determine the bank presently in use.
This register is always accessible except in power down mode and is used to select the register bank in
use.
The upper byte always reads as 33h and can be used to help determine the I/O location of the
LAN91C96I.
The BANK SELECT REGISTER is always accessible regardless of the value of BS0-2.
Accesses to non-existing banks will ignore writes and reads will return 0x33 on byte reads.
BS2
0
0
0
0
1
BS1
0
0
1
1
X
BS0
0
1
0
1
X
BANK #
0
1
2
3
None
I/O SPACE - BANK0
OFFSET
0
NAME
TYPE
SYMBOL
TCR
TRANSMIT CONTROL REGISTER
READ/WRITE
This register holds bits programmed by the CPU to control some of the protocol transmit options.
FDSE
0
PAD_EN
0
ETEN-
TYPE
0
X
EPH
LOOP
0
X
STP
SQET
0
X
FDUPLX
MON_
CSN
0
FORCOL
0
NOCRC
0
X
0
TXP_EN
0
LOOP
0
TXENA
0
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