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| 型號(hào)： | LAN8187I-JT |
| 廠商： | STANDARD MICROSYSTEMS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | High-Performance MII and RMII 10/100 Ethernet PHY with HP Auto-MDIX |
| 中文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, TQFP-64 |
| 文件頁數(shù)： | 46/66頁 |
| 文件大?。?/td> | 545K |
| 代理商： | LAN8187I-JT |
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High-Performance MII and RMII 10/100 Ethernet PHY with HP Auto-MDIX
Datasheet
Revision 0.6 (02-24-06)
46
SMSC LAN8187/LAN8187I
DATASHEET
18.7:5
MODE
PHY Mode of operation. Refer to
Section 5.4.9.2,
"Mode Bus – MODE[2:0]," on page 51
for more
details.
RW,
NASR
18.4:0
PHYAD
PHY Address.
The PHY Address is used for the SMI address and for
the initialization of the Cipher (Scrambler) key. Refer
to
Section 5.4.9.1, "Physical Address Bus -
PHYAD[4:0]," on page 51
for more details.
RW,
NASR
PHYAD
Table 5.40 Register 27 - Special Control/Status Indications
ADDRESS
NAME
DESCRIPTION
MODE
DEFAULT
27.15
AMDIXCTRL
HP Auto-MDIX control
0 - Auto-MDIX enable
1 - Auto-MDIX disabled (use 27.13 to control channel)
RW
0
27.14
Reserved
Reserved
RW
0
27.13
CH_SELECT
Manual Channel Select
0 - MDI -TX transmits RX receives
1 - MDIX -TX receives RX transmits
RW
0
27.12
SWRST_FAST
1 = Accelerates SW reset counter from 256 ms to 10
us for production testing.
RW
0
27:11
SQEOFF
Disable the SQE test (Heartbeat):
0 - SQE test is enabled.
1 - SQE test is disabled.
RW,
NASR
0
27:10
VCOOFF_LP
Forces the Receive PLL 10M to lock on the reference
clock at all times:
0 - Receive PLL 10M can lock on reference or line as
needed (normal operation)
1 - Receive PLL 10M is locked on the reference clock.
In this mode 10M data packets cannot be received.
RW,
NASR
0
27.9
Reserved
Write as 0. Ignore on read.
RW
0
27.8
Reserved
Write as 0. Ignore on read.
RW
0
27.7
Reserved
Write as 0. Ignore on read
RW
0
27.6
Reserved
Write as 0. Ignore on read.
RW
0
27.5
Reserved
Write as 0. Ignore on read.
RW
27.4
XPOL
Polarity state of the 10Base-T:
0 - Normal polarity
1 - Reversed polarity
RO
0
27.3:0
AUTONEGS
Auto-negotiation “ARB” State-machine state
RO
1011b
Table 5.41 Register 28 - Special Internal Testability Controls
ADDRESS
NAME
DESCRIPTION
MODE
DEFAULT
28.15:0
Reserved
Do not write to this register. Ignore on read.
RW
N/A
Table 5.39 Register 18 - Special Modes (continued)
ADDRESS
NAME
DESCRIPTION
MODE
DEFAULT
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