參數(shù)資料
型號： LA76075
元件分類： 消費家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PDIP52
封裝： SDIP-52
文件頁數(shù)： 6/35頁
文件大?。?/td> 712K
代理商： LA76075
No. 5845-14/35
LA76075
Item
Symbol
Measurement
Input
Measurement Procedure
Bus Condition
Point
Signal
[VIF Block]
AFT output voltage with
no signal
Set IF.AGC.DEF to “1” and measure the DC voltage at pin 13.
See Section 4 for the
adjustment value.
VAFTn
13
No
signal
Video output voltage with
no signal
Set IF.AGC.DEF to “1” and measure the DC voltage at pin 45.
See Section 4 for the
adjustment value.
VOn
45
No
signal
Maximum RF AGC
voltage
Set the RF AGC DAC to 0 and measure the DC voltage at pin
6.
See Section 4 for the
adjustment value.
VRFH
6
SG1
91 dB
Minimum RF AGC
voltage
Set the RF AGC DAC to 63 and measure the DC voltage at
pin 6.
See Section 4 for the
adjustment value.
VRFL
6
SG1
91 dB
RF AGC Delay Pt
(@DAC = 0)
Set the RF AGC DAC to 0 and note the point at which the DC
voltage at pin 6 is closest to 3.8 V.
See Section 4 for the
adjustment value.
RFAGC0
6
SG1
RF AGC Delay Pt
(@DAC = 63)
Set the RF AGC DAC to 63 and note the point at which the
DC voltage at pin 6 is closest to 3.8 V.
See Section 4 for the
adjustment value.
RFAGC63
6
SG1
Maximum AFT output
voltage
Apply a 44.75MHz signal to SG4 0 and measure the DC
voltage at pin 13.
See Section 4 for the
adjustment value.
VAFTH
13
SG4
93 dB
Minimum AFT output
voltage
Apply a 46.75MHz signal to SG4 0 and measure the DC
voltage at pin 13.
See Section 4 for the
adjustment value.
VAFTL
13
SG4
93 dB
AFT sensitivity
Vary the SG4 frequency and determine the frequency
differential
f required to change the DC voltage at pin 13
from 2.5 V to 5.0 V. VAFTS = 2500/
f [mV/kHz]
See Section 4 for the
adjustment value.
VAFTS
13
SG4
93 dB
Video output level
Connect an oscilloscope to pin 45 and measure the peak-to-
peak amplitude.
See Section 4 for the
adjustment value.
VO
45
SG6
93 dB
APC pull-in range (U), (L)
Connect an oscilloscope to pin 45, apply a frequency higher
than 45.75 MHz to SG4, and unlock the phase-locked loop to
produce beats. Gradually lower the frequency until the PLL
locks and calculate the difference with 45.75 MHz. Repeat the
procedure from the opposite direction, lowering the frequency
until the PLL unlocks, raising it, and then calculating the
difference between the frequency at which the PLL locks and
45.75 MHz.
See Section 4 for the
adjustment value.
fPU, fPL
45
SG4
93 dB
Sync tip level
Measure the DC voltage at pin 45.
See Section 4 for the
adjustment value.
VOtip
45
SG1
93 dB
Input sensitivity
Connect an oscilloscope to pin 45 and measure the peak-to-
peak amplitude. Gradually lower the input level and note the
level at which the video output amplitude (VO) is –3 dB.
See Section 4 for the
adjustment value.
Vi
45
SG6
Video/sync ratio
Connect an oscilloscope to pin 45, measure the peak-to-peak
amplitudes of the SYNC waveform (Vs) and the brightness
signal (Vy), and determine the ratio Vy/Vs.
See Section 4 for the
adjustment value.
V/S
45
SG6
93 dB
Differential gain
Measure the pin 45 output with a vectorscope.
See Section 4 for the
adjustment value.
DG
45
SG5
93 dB
Differential phase
Measure the pin 45 output with a vectorscope.
See Section 4 for the
adjustment value.
DP
45
SG5
93 dB
Video signal-to-noise
ratio
Pass the pin 45 noise output through a band pass filter
covering 10 kHz to 4 MHz, measure the level (Vsn) with an
RMS voltmeter, and substitute in the following formula.
S/N = 20 log (1.43/Vsn)
See Section 4 for the
adjustment value.
S/N
45
SG1
93 dB
920-kHz beat level
Apply a 93dB signal to SG1 and measure the DC voltage
(V12) at pin 12. Mix the following signals and apply them to
VIF IN: SG1 = 87 dB, SG2 = 82 dB, and SG3 = 62 dB.
Apply the V12 level from an external power supply to pin 12.
Measure the difference between the 3.58MHz and 920kHz
components form pin 45 with a spectrum analyzer.
See Section 4 for the
adjustment value.
I920
45
SG1
SG2
SG3
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