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參數(shù)資料
| 型號(hào)： | LA4064V-75TN44E |
| 廠商： | Lattice Semiconductor Corporation |
| 文件頁(yè)數(shù)： | 1/42頁(yè) |
| 文件大小： | 0K |
| 描述： | IC CPLD 64MACROCELLS 44TQFP |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 系列： | LA-ispMACH |
| 可編程類型： | 系統(tǒng)內(nèi)可編程 |
| 最大延遲時(shí)間 tpd(1)： | 7.5ns |
| 電壓電源 - 內(nèi)部： | 3 V ~ 3.6 V |
| 宏單元數(shù)： | 64 |
| 輸入/輸出數(shù)： | 30 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-TQFP |
| 供應(yīng)商設(shè)備封裝： | 44-TQFP（10x10） |
| 包裝： | 托盤 |
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1
DS1017_02.5
LA-ispMACH 4000V/Z
Automotive Family
3.3V/1.8V In-System Programmable
SuperFAST High Density PLDs
May 2009
Data Sheet DS1017
TM
2009 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specications and information herein are subject to change without notice.
Features
■ High Performance
fMAX = 168MHz maximum operating frequency
tPD = 7.5ns propagation delay
Up to four global clock pins with programmable
clock polarity control
Up to 80 PTs per output
■ Ease of Design
Enhanced macrocells with individual clock,
reset, preset and clock enable controls
Up to four global OE controls
Individual local OE control per I/O pin
Excellent First-Time-Fit
TM and ret
Fast path, SpeedLocking
TM Path, and wide-PT
path
Wide input gating (36 input logic blocks) for fast
counters, state machines and address decoders
■ Zero Power (LA-ispMACH 4000Z)
Typical static current 10A (4032Z)
1.8V core low dynamic power
LA-ispMACH 4000Z operational down to 1.6V
■ AEC-Q100 Tested and Qualied
Automotive: -40 to 125°C ambient (TA)
■ Easy System Integration
Superior solution for power sensitive consumer
applications
Operation with 3.3V, 2.5V or 1.8V LVCMOS I/O
Operation with 3.3V (4000V) or 1.8V (4000Z)
supplies
5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI
interfaces
Hot-socketing
Open-drain capability
Input pull-up, pull-down or bus-keeper
Programmable output slew rate
3.3V PCI compatible
IEEE 1149.1 boundary scan testable
3.3V/2.5V/1.8V In-System Programmable
(ISP) using IEEE 1532 compliant interface
I/O pins with fast setup path
Lead-free (RoHS) package
Introduction
The high performance LA-ispMACH 4000V/Z automo-
tive family from Lattice offers a SuperFAST CPLD solu-
tion that is tested and qualied to the AEC-Q100
standard. The family is a blend of Lattice’s two most
popular architectures: the ispLSI
2000 and ispMACH
4A. Retaining the best of both families, the LA-ispMACH
4000V/Z architecture focuses on signicant innovations
to combine the highest performance with low power in a
exible CPLD family.
The LA-ispMACH 4000V/Z automotive family combines
high speed and low power with the exibility needed for
ease of design. With its robust Global Routing Pool and
Output Routing Pool, this family delivers excellent First-
Time-Fit, timing predictability, routing, pin-out retention
and density migration.
Table 1. LA-ispMACH 4000V Automotive Family Selection Guide
LA-ispMACH 4032V
LA-ispMACH 4064V
LA-ispMACH 4128V
Macrocells
32
64
128
I/O + Dedicated Inputs
30+2/32+4
30+2/32+4/64+10
64+10/92+4/96+4
tPD (ns)
7.5
tS (ns)
4.5
tCO (ns)
4.5
fMAX (MHz)
168
Supply Voltage (V)
3.3V
Pins/Package
44-pin Lead-Free TQFP
48-pin Lead-Free TQFP
44-pin Lead-Free TQFP
48-pin Lead-Free TQFP
100-pin Lead-Free TQFP
128-pin Lead-Free TQFP
144-pin Lead-Free TQFP
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LA4064V-75TN48E | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 Auto Grade (AEC-Q100 ) ispMACH4064V RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| LA4064V-75TN48ETR | 制造商:Lattice Semiconductor Corporation 功能描述: |
| LA4064ZC-75TN100E | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 Auto Grade (AEC-Q100 ) ispMACH4064Z RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| LA4064ZC-75TN128E | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V/1.8V In-System Programmable SuperFAST High Density PLDs |
| LA4064ZC-75TN144E | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V/1.8V In-System Programmable SuperFAST High Density PLDs |
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