參數(shù)資料
型號: L9942
廠商: STMICROELECTRONICS
元件分類: 運動控制電子
英文描述: STEPPER MOTOR CONTROLLER, PDSO36
封裝: POWER, SO-36
文件頁數(shù): 10/21頁
文件大?。?/td> 161K
代理商: L9942
Table 2. Program space.
RESERVED *)
0000h
÷007Fh
USER PROGRAM ROM
(3872 BYTES)
0080h
÷0F9Fh
RESERVED *)
0FA0h
÷0FEFh
INTERRUPT VECTOR #4
0FF0h,0FF1h
INTERRUPT VECTOR #3
0FF2h,0FF3h
INTERRUPT VECTOR #2
0FF4h,0FF5h
INTERRUPT VECTOR #1
0FF6h,0FF7h
RESERVED *)
0FF8h,0FFBh
INTERRUPT VECTOR #0
0FFCh,0FFDh
*) This area is reserved for test purpose and is not available for the user.
INTERRUPTS STRUCTURE
Interrupt Option Register IOR
Bit 6 of register C8h is used to select negative edge (B6 = 0) or low level (B6 = 1) I1 interrupt sensitivity.
Bit 5 of register C8h is used to select negative edge (B5 = 0) or positive edge (B5 = 1) I2 interrupt
sensitivity.
Bit 4 of register C8h is used to disable (B4=0) all maskable interrupts.
Register C8h is cleared during reset.
There are no read and single bit instructions possible.
See also interrupt circuit diagram (Fig. 11).
Test mode pin TEST has to be low for normal operation.
Interrupts
Non maskable interrupt input IO is connected to the power bridge flags (start address FFCH).
I1 is connected to PORT A
(start address FF6H).
I2 is connected to Bus Interface and CAN Controller
(start address FF4H).
I3 is connected to Contact Monitor
(start address FF2H).
I4 is connected to TIMER1
(start address FF0H).
The interrupt characteristics of I/O port A can be programmed in four different modes.
Interrupt polarity is selected by bit PAES of register BPCR, interrupt sensitivity is controlled by bit 6 of
register IOR (see following table 3).
Table 3. I/O port interrupt selection.
PAES
IOR6
Port A interrupt
0
falling edge
0
1
low level
1
0
rising edge
1
high level
MICROCONTROLLER SECTION (continued)
L9942
18/21
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