參數(shù)資料
型號(hào): L9826
廠商: 意法半導(dǎo)體
英文描述: Octal Low-Side Driver for resistive and inductive loads with serial/parallel input control, output protection and diagnostic
中文描述: 八路低端與串行電阻和電感負(fù)載驅(qū)動(dòng)器/并行輸入控制,輸出保護(hù)和診斷
文件頁數(shù): 7/12頁
文件大?。?/td> 174K
代理商: L9826
7/12
L9826
Figure 1. Timing of the Serial Interface.
The SPI register data are transferred to the output latch at rising NCS edge. The digital filter between NCS and
the output latch ensures that the data are transferred only after 8 CLK cycles or multiple of 8 CLK cycles since
the last NCS falling edge. The NCS changes only at low CLK.
Outputs Control Tables :
Figure 2. Output Control register structure
Outputs 1, 2:
Outputs 3 to 8:
NON1, 2
1
0
0
1
SPI-bit 1, 2
0
0
1
1
SPI-bit 3 ... 8
0
1
Output 1, 2
off
on
on
on
Output 3 ... 8
off
on
NCS
CLK
SDI
SDO
tsclch
thclcl
tclh
tcll
tsclcl
thclch
tcsdv
tpcld
tpchdz
not defined
D8
D1
tscld
thcld
D8
D7
D1
Q2
Q4
Q6
Q8
Q1
Q3
Q5
Q7
MSB
LSB
Control-bit output 7
Control-bit output 5
Control-bit output 3
Control-bit output 1
Control-bit output 8
Control-bit output 6
Control-bit output 4
Control-bit output 2
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