參數(shù)資料
型號: L9377DIE1
廠商: 意法半導(dǎo)體
英文描述: DUAL INTELLIGENT POWER LOW SIDE SWITCH
中文描述: 雙智能電源開關(guān)偏低
文件頁數(shù): 8/9頁
文件大小: 69K
代理商: L9377DIE1
CIRCUIT DESCRIPTION
The L9377 is a dual low side driver for inductive
loads like valves in automotive environment. The
device is enabled by a common CMOS compat-
ible ENABLE high signal. The internal pull down
current sources at the ENABLE and INPUT pins
protect the device in open input conditions
against malfunctions. An output slope limitation
for du/dt is implemented to reduce the EMI. An in-
tegrated active flyback voltage limitation clamps
the output voltage during the flyback phase to
50V.
Each driver is protected against short circuit and
thermal overload. In short circuit condition the
output will be disabled after a short delay time
t
DOL
to suppress spikes. This disable is latched
until a negative slope occure at the correspondent
input pin. The thermal disable for T
J
> 175°C of
the output will be reseted if the junction tempera-
ture decreases about 20°C below the disable
threshold temperature.
For the real time error diagnosis the voltage and
the current of the outputs are compared with in-
ternal fixed values VO
UV
for OFF and IO
UC
for ON
conditions to recognize open load (R
L
20K
, R
L
> 38
) in ON and OFF conditions. The diagnostic
operates also in the extended supply voltage
range of 4.5V
VS
32V.
Also the output voltages VO
1,2
are compared
against each other in OFF condition with a fixed
offset of
VO
UV 1,2
to recognize GND bypasses.
To suppress mail
VO diagnoses during the fly-
back phases of the compared output, the
VO di-
agnostic includes a latch function. Reaching the
flyback clamping voltage VO
C
the diagnostic sig-
nal is reseted by a latch. To activate again this
kind of diagnostic a low signal at the correspon-
dent INPUT or the ENABLE pin must occur (see
also Fig.3).
The diagnostic output level in connection with dif-
ferent ENABLE and INPUT conditions allows to
recognize different fail states, like overtemp, short
to VSS, short to GND, bypass to GND and dis-
connected load (see also page 7 diagnostic ta-
ble).
The diagnostic output is also protected against
short to UD
max
. Oversteping the over load current
threshold IO
o
, the output current will be limited in-
ternally during the diagnostic overload delay
switch-off time t
DOL
.
OUT1
OUT2
VS
ZVALVE
ZVALVE
VBatt
Channel 1
Channel 2
Output
Control
Overtemp
R
Q
S
Delay
Timer
Overload
Openload
GND
DIAG2
IN2
EN
DIAG1
IN1
Controller
+5V
RO
Diagnostic
Control
μ P
Figure 5:
Application circuit diagram.
L9377
8/9
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