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L6997S
18/30
Power MOSFET for us and ls, the total power they dissipate does not depend on the duty cycle. Thus, if PON
is this power loss (few percent of the rated output power), the required
RDS
ON
(@ 25 °C) can be derived from:
(24)
α
is the temperature coefficient of RDS
ON
(typically,
α
= 510
-3
°C
-1
for these low-voltage classes) and T the
admitted temperature rise. It is worth noticing, however, that generally the lower RDS
ON
, the higher is the gate
charge Q
G
, which leads to a higher gate drive consumption. In fact, each switching cycle, a charge Q
G
moves
from the input source to ground, resulting in an equivalent drive current:
(25)
A SCHOTTKY diode can be added to increase the system efficiency at high switching frequency (where the
dead times could be an important part of total switching period).
This optional diode must be placed in parallel to the synchronous rectifier must have a reverse voltage VRRM
greater than VIN
MAX
. The current size of the diode must be selected in order to keep it in safe operating condi-
tions. In order to use less space than possible, a double MOSFET in a single package is chosen: STS5DNF20V
6.5 Output voltage setting
The first step is choosing the output divider to set the output voltage. To select this value there isn't a criteria,
but a low divider network value (around 100
) decries the efficiency at low current; instead a high value divider
network (100K
) increase the noise effects. A network divider values from 1K
to 10K
is right. We chose:
R3 = 1K
R2 = 1.1K
The device output voltage is adjustable by connecting a voltage divider from output to VSENSE pin. Minimum
output voltage is V
OUT
=VREF=0.6V. Once output divider and frequency divider have been designed as to obtain
the required output voltage and switching frequency, the following equation gives the smallest input voltage,
which allows L6997S to regulate (which corresponds to T
OFF
=T
OFFMIN
):
α
α
OUT
K
T
OFF,MIN
(26)
6.6 Voltage Feedforward
From the equations 1,2 and 3, choosing the switching frequency of 270kHz the resistor divider can be selected.
For example:
R3 = 470K
R4 = 8.5K
6.7 Current limit resistor
From the equation 8 the valley current limit can be set considering the RDS
ON
STS5DNF20V and I
CIR
= 5A:
R8 = 120K
6.8 Integrator capacitor
Let’s assume F
U
= 15kHz, V
OUT
= 1.25V.
Since V
REF
= 0.6V, from equation 2, of the device description, it follows
α
O
UT
= 0.348 and, from equation 5 it
follows C = 250pF. The output ripple is around 22mV, so the system doesn't need the second integrator capac-
itor.
RDS
ON
P
1
(
Iout
2
α
T
+
)
------------------------------------------------
=
Iq
Qg F
SW
=
δ
1
--------------
-------------------------
MAX
---------------------------------------------
–
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