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參數(shù)資料
| 型號： | L6919CD |
| 廠商： | 意法半導體 |
| 英文描述： | 5 BIT PROGRAMMABLE DUAL-PHASE CONTROLLER WITH DYNAMIC VID MANAGEMENT |
| 中文描述： | 5位可編程雙相與動態(tài)VID管理控制器 |
| 文件頁數(shù)： | 6/32頁 |
| 文件大?。?/td> | 558K |
| 代理商： | L6919CD |
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L6919C
6/32
PIN FUNCTION
N
Name
Description
1
LGATE1
Channel 1 low side gate driver output.
2
VCCDR
LS Mosfet driver supply. It can be varied from 5V to 12V.
3
PHASE1
This pin is connected to the source of the upper mosfet and provides the return path for the high
side driver of channel 1.
4
UGATE1
Channel 1 high side gate driver output.
5
BOOT1
Channel 1 bootstrap capacitor pin. Through this pin is supplied the high side driver and the upper
mosfet. Connect through a capacitor to the PHASE1 pin and through a diode to Vcc (cathode vs.
boot).
6
VCC
Device supply voltage. The operative supply voltage is 12V.
7
GND
All the internal references are referred to this pin. Connect it to the PCB signal ground.
8
COMP
This pin is connected to the error amplifier output and is used to compensate the control
feedback loop.
9
FB
This pin is connected to the error amplifier inverting input and is used to compensate the voltage
control feedback loop.
A current proportional to the sum of the current sensed in both channel is sourced from this pin
(50
μ
A at full load, 70
μ
A at the 140% Constant Current threshold). Connecting a resistor between
this pin and VSEN pin allows programming the droop effect.
10
VSEN
Connected to the output voltage it is able to manage Over&Under-voltage conditions and the
PGOOD signal. It is internally connected with the output of the Remote Sense Buffer for Remote
Sense of the regulated voltage.
If no Remote Sense is implemented, connect it directly to the regulated voltage in order to
manage OVP UVP and PGOOD.
11
FBR
Remote sense buffer non-inverting input. It has to be connected to the positive side of the load to
perform a remote sense.
If no remote sense is implemented, connect directly to the output voltage (in this case connect
also the VSEN pin directly to the output regulated voltage).
12
FBG
Remote sense buffer inverting input. It has to be connected to the negative side of the load to
perform a remote sense.
Pull-down to ground if no remote sense is implemented.
13
ISEN1
Channel 1 current sense pin. The output current may be sensed across a sense resistor or
across the low-side mosfet R
dsON.
This pin has to be connected to the low-side mosfet drain or to
the sense resistor through a resistor Rg in order to program the over current intervention for this
phase at 140% as follow:
---------------------------
=
Where 35
μ
A is the current offset information relative to the Over Current condition (offset at OC
threshold minus offset at zero load).
The net connecting the pin to the sense point must be routed as close as possible to the
PGNDS1 net in order to couple in common mode any picked-up noise.
14
PGNDS1
Channel 1 Power Ground sense pin. The net connecting the pin to the sense point must be
routed as close as possible to the ISEN1 net in order to couple in common mode any picked-up
noise.
15
PGNDS2
Channel 2 Power Ground sense pin. The net connecting the pin to the sense point must be
routed as close as possible to the ISEN2 net in order to couple in common mode any picked-up
noise.
I
OCPx
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| L6919CDTR | 功能描述:DC/DC 開關控制器 Prog Dual-Phase Cont RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風格: 封裝 / 箱體:CPAK |
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