參數(shù)資料
型號(hào): L6731B
廠商: 意法半導(dǎo)體
英文描述: Transistor; Type: Amplifiers/Bipolar; VCEO (V): 25; Ic (A): 1; Pc (W): 0.8; hFE: 85 to 330; VCE (sat) (V) max: 0.5; Package: TO-92Mod
中文描述: 可調(diào)式降壓同步整流專用的DDR控制器內(nèi)存
文件頁(yè)數(shù): 6/24頁(yè)
文件大?。?/td> 311K
代理商: L6731B
Pin connections and functions
L6731B
6/24
3
Pin connections and functions
Figure 2.
Pins connection ( Top view)
Table 3.
Pin functions
Pin n.
Name
Function
1
PGOOD
This pin is an open collector output and it is pulled low if the output voltage is not
within the specified thresholds (90%-110%). If not used it may be left floating. Pull-up
this pin to V
CCDR
with a 10K resistor to obtain a logical signal.
2
V
TTREF
This pin is connected to the output of an internal buffer that provides of DDR-IN.
This pin can be connected to the V
TTREF
input of the DDR memory itself. Filter to GND
with 10nF capacitor.
3
SGND
All the internal references are referred to this pin.
4
FB
This pin is connected to the error amplifier inverting input. Connect it to V
OUT
through
the compensation network. This pin is also used to sense the output voltage in order
to manage the over voltage conditions and the PGood signal.
5
COMP
This pin is connected to the error amplifier output and is used to compensate the
voltage control feedback loop.
6
SS/INH
The soft-start time is programmed connecting an external capacitor from this pin and
GND. The internal current generator forces a current of 10
μ
A through the capacitor.
When the voltage at this pin is lower than 0.5V the device is disabled.
7
DDR-IN
By setting the voltage at this pin is possible to select the internal/external reference
and the switching frequency:
V
EAREF
0-80% of V
CCDR
-> External Reference/F
SW
=250KHz
V
EAREF
= 80%-95% of V
CCDR
-> V
REF
= 0.6V/F
SW
=500KHz
V
EAREF
= 95%-100% of V
CCDR ->
V
REF
= 0.6V/F
SW
=250KHz
An internal clamp limits the maximum V
EAREF
at 2.5V (typ.). The device captures the
analog value present at this pin at the start-up when V
CC
meets the UVLO threshold.
1
2
3
4
5
6
11
12
HTSSOP16
13
14
15
16
SGND
DDR-IN
OCL
FB
PGOOD
VTTREF
COMP
SS/INH
VCC
LGATE
PHASE
OCH
PGND
7
10
VCCDR
BOOT
HGATE
8
9
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