參數(shù)資料
型號: L6713ATR
廠商: Holtek Semiconductor Inc.
英文描述: 2/3 Phase controller with embedded drivers for Intel VR10, VR11 and AMD 6 bit CPUs
中文描述: 2 / 3為英特爾VR10,VR11和AMD的嵌入式驅(qū)動器相控制器6位CPU
文件頁數(shù): 32/64頁
文件大?。?/td> 515K
代理商: L6713ATR
Load Transient Boost TechnologyTM
L6713A
38/64
13.1
LTB Gain modification (Optional)
The internal gain can be modified through the SS/LTBG/AMD pin, as shown in the
Figure 13.
The SS/LTBG/AMD pin is also used to set the Soft Start time, so the current flowing from
SS/LTBG/AMD pin has to be modified only after the Soft Start has been finished.
Using the D diode and R3 resistor (red square in Figure 13), after the Soft Start the current
flowing from SS/LTBG/AMD pin versus SGND is zero, so the internal gain is not modified.As
a consequence the LTB gain is the default value (LTB Gain = 2).
To decrease the LTB gain it is necessary to use the circuit composed by Q, R1 and R2 (blue
square in Figure 13.)
After the Soft-Start the current flowing from SS/LTBG/AMD pin depends only on R1 resistor,
so reducing the R1 resistor value the LTB gain can be reduced. The sum of R1 and R2
resistors have to be selected to have the desiderated Soft Start time.
Figure 13. SS/OSC/LTB connections to modify LTB Gain when using INTEL mode.
SS/LTBG/ AMD
SS_END
R2
R1
R3
D
Q
RPull-Up(1k)
VPull-Up(1.2V)
to SSEND Logic
LTB GAIN=2
LTB GAIN <2
Rb(10k)
相關(guān)PDF資料
PDF描述
L6713A 2/3 Phase controller with embedded drivers for Intel VR10, VR11 and AMD 6 bit CPUs
L6X8E6 600 V, 0.8 A, 4 QUADRANT LOGIC LEVEL TRIAC, TO-92
L8C201JC15 x9 Asynchronous FIFO
L8C202JI10 x9 Asynchronous FIFO
L8C202JI12 x9 Asynchronous FIFO
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