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參數(shù)資料
| 型號(hào)： | L6560D |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | POWER FACTOR CORRECTOR |
| 中文描述： | 功率因數(shù)校正 |
| 文件頁(yè)數(shù)： | 4/11頁(yè) |
| 文件大?。?/td> | 123K |
| 代理商： | L6560D |
OVER VOLTAGEPROTECTION OVP
The output voltage is expected to be kept by the
operation of the PFC circuits close to its reference
value that is set by the ratio of the twoexternalre-
sistors R
1
and R
2
(see fig. 2), taking into consid-
eration that the non inverting input of the error
amplifier is biased inside the L6560 at 2.5V.
In steady state conditions, the current through R1
and R2 is:
I
SC
=
V
outsc
2.5
R1
or I
SC
=
2.5
R2
and, if the external compensation network is
made only with a capacitor C, the current through
C is equalzero.
When the output voltage increases abruptly the
current throughR1 becomes:
I
R1
=
V
out
2.5
R1
I
R1
=
V
outsc
+
V
OUT
2.5
R1
=
I
sc
+
I.
Since the current through R2 doesn’t change, the
I current must flow through the capacitor C and
enter in the error amplifier.
This current is mirrored inside the L6560, and
compared with a precise internal reference of
40
μ
A. Whenever such 40
μ
A limit is exceed, the
OVP protection is triggered (Dynamic OVP), and
the external power transistor is switched off, until
the overvoltage situation disappears. However if
the overvoltage persists, before that the transient
condition of dynamic circuit exhausts,an internal
comparator (Static OVP) latches the OVP condi-
tion keeping the external power switch turned off
(see fig. 1).
The OVP value is threfore set by the equation
OVP =
Vout = R
1
40
μ
A.
Typical values for R
1
, R
2
and C are reported in
the application circuit. The overvoltage can be set
independently from the average output voltage.
The precision in setting the overvoltage threshold
is 7% of the overvoltage value (for instance
V =
60V
±
4.2V).
ELECTRICALCHARACTERISTICS
(continued)
ZEROCURRENT DETECTOR
Symbol
V
ZCD
Pin
5
Parameter
Test Condition
Min.
1.8
Typ.
Max.
2.3
Unit
V
Input Threshold Voltage Rising
Edge
Hysteresis
Clamp Voltage
Clamp Voltage
0.3
5
0.4
0.5
5.7
0.7
0.7
6.4
1
V
V
V
V
ZCD
V
ZCD
5
5
I
ZCD
= 3mA
I
ZCD
= –3mA
OUTPUT SECTION
Symbol
V
GD
Pin
7
Parameter
Test Condition
I
GDsource
= 200mA
I
GDsource
= 20mA
I
GDsink
= 200mA
I
GDsink
= 20mA
CL = 1nF
CL = 1nF
Min.
Typ.
1.2
0.7
Max.
2
1
1.5
0.3
120
100
Unit
V
V
V
V
ns
ns
Dropout Voltage
t
r
t
f
7
7
Output Voltage Rise Time
Output Voltage Fall Time
50
40
OUTPUT OVERVOLTAGE SECTION
Symbol
I
OVP
Pin
2
Parameter
Test Condition
Min.
36
Typ.
40
Max.
44
Unit
μ
A
OVP Triggering Current
RESTART TIMER
Symbol
t
START
Pin
Parameter
Test Condition
Min.
45
Typ.
60
Max.
Unit
μ
s
Start Timer
L6560 - L6560A
4/11
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| L6561D | 功能描述:功率因數(shù)校正 IC Wide Input Voltage RoHS:否 制造商:Fairchild Semiconductor 開(kāi)關(guān)頻率:300 KHz 最大功率耗散: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Reel |
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