參數(shù)資料
型號(hào)： L640MU12VI
廠(chǎng)商： Advanced Micro Devices, Inc.
元件分類(lèi)： DRAM
英文描述： 64 Megabit (4 M x 16-Bit) MirrorBita?? 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/Oa?? Control
中文描述： 64Mb(4個(gè)M x 16位)的MirrorBit，3V，統(tǒng)一扇區(qū)閃存并有Versatile輸入/輸出控制
文件頁(yè)數(shù)： 39/59頁(yè)
文件大?。?/td> 699K
代理商： L640MU12VI
February1,2007 25301C5
Am29LV640MU
37
D A T A S H E E T
DC CHARACTERISTICS
CMOS Compatible
Notes:
1. The I
CC
current listed is typically less than 2 mA/MHz, with OE# at V
IH
.
2. Maximum I
CC
specifications are tested with V
CC
= V
CC
max.
3. I
CC
active while Embedded Erase or Embedded Program is in progress.
4. Automatic sleep mode enables the low power mode when addresses remain stable for t
ACC
+ 30 ns. Typical sleep mode current is
200 nA.
5. If V
IO
< V
CC
, maximum V
IL
for CE# and DQ I/Os is 0.3 V
IO
. If V
IO
< V
CC
, minimum V
IH
for CE# and DQ I/Os is 0.7 V
IO
. Maximum V
IH
for these connections is V
IO
+ 0.3 V
6. V
CC
voltage requirements.
7. V
IO
voltage requirements. V
CC
= 3 V and V
IO
= 3 V or 1.8 V. When V
IO
is at 1.8 V, I/Os cannot operate at 3 V.
8. Not 100% tested.
9. Includes RY/BY#.
Parameter
Symbol
Parameter Description
Test Conditions
Min
Typ
Max
Unit
I
LI
Input Load Current (Note 1)
V
IN
= V
SS
to V
CC
,
V
CC
= V
CC
max
V
CC
= V
CC max
; A9 = 12.5 V
V
OUT
= V
SS
to V
CC
,
V
CC
= V
CC max
±
1.0
μA
I
LIT
A9, ACC Input Load Current
35
μA
I
LO
Output Leakage Current
±
1.0
μA
I
LR
Reset Leakage Current
V
CC
= V
CC max
; RESET# = 12.5 V
35
μA
I
CC1
V
CC
Active Read Current
(Notes 1, 2)
CE# = V
IL,
OE# = V
IH
5 MHz
15
20
mA
1 MHz
15
20
I
CC2
V
CC
Initial Page Read Current
(Notes 1, 2)
CE# = V
IL,
OE# = V
IH
30
50
mA
I
CC3
V
CC
Intra-Page Read Current
(Notes 1, 2)
CE# = V
IL,
OE# = V
IH
10
20
mA
I
CC4
I
CC5
I
CC6
V
CC
Active Write Current (Notes 2, 3) CE# = V
IL,
OE# = V
IH
V
CC
Standby Current (Note 2)
V
CC
Reset Current (Note 2)
50
60
mA
CE#, RESET# = V
CC
±
0.3 V
RESET# = V
SS
±
0.3 V
V
IH
= V
CC
±
0.3 V;
V
IL
= V
SS
±
0.3 V
1
5
μA
1
5
μA
I
CC7
Automatic Sleep Mode (Notes 2, 4)
1
5
μA
V
IL1
V
IH1
V
IL2
V
IH2
Input Low Voltage 1(Notes 5, 6)
–0.5
0.8
V
Input High Voltage 1 (Notes 5, 6)
0.7 x V
CC
–0.5
V
CC
+ 0.5
0.3 x V
IO
V
IO
+ 0.5
V
Input Low Voltage 2 (Notes 5, 7)
V
Input High Voltage 2 (Notes 5, 7)
0.7 x V
IO
V
V
HH
Voltage for ACC Program
Acceleration
V
CC
= 2.7 –3.6 V
11.5
12.5
V
V
ID
Voltage for Autoselect and Temporary
Sector Unprotect
V
CC
= 2.7 –3.6 V
11.5
12.5
V
V
OL
V
OH1
V
OH2
V
LKO
Output Low Voltage (Note 9)
I
OL
= 4.0 mA, V
CC
= V
CC min
= V
IO
I
OH
= –2.0 mA, V
CC
= V
CC min
= V
IO
I
OH
= –100 μA, V
CC
= V
CC min
= V
IO
0.15 x V
IO
V
Output High Voltage
0.85 V
IO
V
IO
–0.4
2.3
V
V
Low V
CC
Lock-Out Voltage (Note 8)
2.5
V
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