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參數(shù)資料
| 型號(hào)： | L6353 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Smart Driver for Power MOS & IGBT(用于MOS和絕緣柵雙極晶體管的智能驅(qū)動(dòng)器) |
| 中文描述： | 智能驅(qū)動(dòng)功率MOS |
| 文件頁(yè)數(shù)： | 7/11頁(yè) |
| 文件大?。?/td> | 108K |
| 代理商： | L6353 |
INPUT INTERFACE
To drive the external power device three different
possibilitiesare allowed:
The Logic Level Mode, either direct or inverted,
and the Pulse Transformer Mode
Using the Logic Level Mode (direct) an high level
(referred to COM), at the INPUT pin will start the
Turn on Procedure (i.e. firing an N channel exter-
nal device). A low level (referred to COM) will in-
stead closethe OUT2pin to VSS.
The functioning is reversed in the inverted mode.
To select the direct mode the SELECT pin must
be connected via a capacitor to COM. The in-
verted mode is chosen by connecting the SE-
LECT pin to COM.
In logic Level Mode pulses lasting less than t
inh
(200nstyp.) are filtered out.
In the Pulse Transformer Mode the SELECT pin
will be the reference pin for the signal applied to
the INPUTpin. The positive pulse will start the
TURN ON PROCEDURE, while the negative
pulse will close OUT2 to V
SS
. The duration of this
pulses (t
w
, see fig.2) must be againt
w
> t
inh
.
TURN-ON PROCEDURE
The firing of the external power device is per-
formed in three steps in order to avoid the most
common problemsthat can arise.
In each of these steps there are a number of pa-
rametersthat can be easilyexternallypresetted to
the requestedvalues.
First Step
Parameter:
t
DELAY
In order to avoid cross-conduction between the
external power device in half bridge arrangement
the driver output is activated after an externally
programmable delay time (t
DELAY
, see fig. 3) after
the input signal. To set the t
DELAY
interval an R-C
network has to be connected between the DE-
LAY, V
REF
and COM pins (seefig.4) giving:
t
DELAY
(
μ
sec) = R
EXT
(K
) . C
EXT
(nF)+t
on
To minimize this interval only a resistor has to be
connected between the DELAY and the V
REF
lim-
iting thus the duration to the internal propagation
delay ton.
Second step
Parameters:
t
MON_DELAY
, V
CL
To protect the driven device from latch-up at turn-
on (IGBT) after the t
DELAY
time interval a second
externally programmable time interval
LAY
(presettable using the same technique used
to setthe t
DELAY
interval, see fig.4)
t
MON-DELAY
(
μ
sec)= R
EXT
(K
) . C
EXT
(nF)
during the t
MON_DELAY
the voltage on the V
OUT1)
is limited to the V
CL
level. To program this value
an appropriate voltage drop has to be imposed,
by mean of a resistive voltage divider, at the
CLAMP_PROG pin according to the following for-
mula:
t
MON_DE-
100nF
LOGIC
V
SS
(**)
OUT2
OUT1
V
POS
D94IN116B
V
REF
MON DELAY
CLAMP_PROG
COM
V
H.V.
DFW
LOAD
1.2
5.6
V
G
ON_SENSE
V
CE
INPUT
V
in
V
REF
12K
2.2K
100nF
(*)
47K
V
REF
1nF
ON_LEV_PROG
DELAY
V
REF
100pF
4.7K
V
REF
12K
12K
100nF
(*)
POSITIVE
SUPPLY
100
μ
F-35V
100
μ
F-10V
NEGATIVE
SUPPLY
100nF
SELECT
V
CC
NOTES:
(*) The capacitor is required if the pin isleft floating.
(**) If the negative supply is not used, the V
SS
pin must be connected to the COM pin as close as possible to the IC.
Figure 4.
Gatedriving waveformstest circuit.
L6353
7/11
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|---|---|
| L6353D | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:SMART DRIVER FOR POWER MOS & IGBT |
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| L6362 | 制造商:STMicroelectronics 功能描述: |
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