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參數(shù)資料
| 型號(hào)： | L6285S |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 3 CHANNELS MULTIPOWER SYSTEM |
| 中文描述： | 3通道移動(dòng)電站系統(tǒng) |
| 文件頁(yè)數(shù)： | 10/16頁(yè) |
| 文件大?。?/td> | 303K |
| 代理商： | L6285S |
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OscillatorFor Clock and Reset Generation
The oscillator block provides for two functions:
1)Generate an internal reset signal when the
voltage at pin osc/res is below 1V. The reset
signal switches off all the outputs and resets
the logic registers.
2)Generate,when the pin osc/resis left free two
syncro signals p1 and p2 for the clock of the
PWM Current Control of the two stepper
driver blocks
The oscillator operates
like the 555 concept in
which the capacitor voltage oscillates between
1/3V
S
2/3V
S
(Fig. 6). The oscillator frequencyis 2
times the choppingfrequency in order to generate
the two syncro signals at operative 20KHz PWM.
The t
CH
= charge time of Cosc is defined by R
osc
,
V
TH1
and V
TH2
( threshold voltages)and C
osc
.
The discharge time T
dsc
is practically only defined
by Cosc and the internal discarge resistor Rdsc.
The t
dsc
is also the time lockout during which the
RS FF cannot read the Comparator output (see
Fig. 4)
Figure 6
: Oscillator Concept
L6285
10/16
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