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BLOCK DIAGRAM DESCRIPTION
(see Block Diagram)
Inside the I.C. there are two unipolar stepper mo-
tor drivers,one bridge driver for DC motor,4x4 bit
latch registers, one shift register. the input logic,
the charge pump, and the thermal protection.
The following conditions are valid for all the 3
driver sections:
1)When the osc/res pin is tied to GND, an inter-
nal reset signal is generated which switches
off all the outputs and resets the internal reg-
isters.
2)The conditions1 is valid also during power on
and power off transitions.
3)During power on and power off, the I.C. is
safe for any conditionsof V
S
and V
p
3)If V
p
is present and V
S
desappears,the out-
puts are switched off.
Input Logic
The input CMOS logic interfacesthe microproces-
sor logic to the 4 registers. An integrated Schmitt-
trigger circuit is used to improve noise immunity
at each logic input.
The data is introduced in the 16bit shift register by
the SID pin. The first bit b 15 after 16 clock ap-
plied to SCK pin will be the D15 of the shift regis-
ter.
On the falling edge of STB the 16 bits of the shift
register are transferred to the outputs of the 4
latch registers. Fig 2 shows the timing.
CHA and CHB Stepper Motor Drivers
REGISTER 1
D0
D1
D2
D3
D0
D1
D2
D3
D0
D1
D2
D3
D0
D1
D2
D3
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
PHASE 1A
NPHASE 2A
PHASE 3A
NPHASE 4A
PHASE 1B
NPHASE2B
PHASE 3B
NPHASE4B
D/A CHANNEL A
D/A CHANNEL A
D/A CHANNEL B
D/A CHANNEL B
INPUT 1
INPUT 2
V2 VOLTAGE
V2 VOLTAGE
CHANNEL A
CHANNEL A
CHANNEL A
CHANNEL A
CHANNEL B
CHANNEL B
CHANNEL B
CHANNEL B
LEAST
MOST
LEAST
MOST
CHANNEL C
CHANNEL C
CHANNEL C
CHANNEL C
REGISTER 2
REGISTER 3
REGISTER 4
Registers
The ComboMotor Driver controlsthe 3 channels using 4 latch registers of 4 bit each:
D0
0
1
1
0
0
0
0
0
1
D1
0
0
0
0
1
1
1
0
0
ALL THE OTHERS
D2
0
0
1
1
1
0
0
0
0
D3
0
0
0
0
0
0
1
1
1
OUT1 A/B
OFF
ON
ON
OFF
OFF
OFF
OFF
OFF
ON
OFF
OUT2 A/B
OFF
OFF
OFF
OFF
ON
ON
ON
OFF
OFF
OFF
OUT3 A/B
OFF
OFF
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OUT4A/B
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
OFF
Register 1/2 Output Status
(CHAand CHB). See note 1
DO
0
0
1
1
D1
0
1
0
1
REFER. VOLTAGE CHANNEL A
0.125 V
0.250 V
0.375 V
0.500 V
Register 3 Current Reference
(D/A OUTPUT)
D2
0
0
1
1
D3
0
1
0
1
REFER. VOLTAGE CHANNEL B
0.125 V
0.250 V
0.375 V
0.500 V
L6285
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