參數(shù)資料
型號(hào)： L6260
廠商： STMICROELECTRONICS
元件分類： 運(yùn)動(dòng)控制電子
英文描述： DISK DRIVE MOTOR CONTROLLER, 1.5 A, PQFP64
封裝： TQFP-64
文件頁(yè)數(shù)： 25/30頁(yè)
文件大?。?/td> 440K
代理商： L6260
PIN DESCRIPTION (continued)
Pin Types: I = Input, O = Output, P = Power, A = Analog (passive)
VCM Driver and DAC
PIN #
PIN NAME
DESCRIPTION
PIN
TYPE
I\O
MAPPED?
TRI-STATE
@SLEEP/@POR
53
VCM_I_SNS1
High side of VCM sense resistor network. This pin
provides the current to the network as well as
sensing the total voltage across both sense
resistors. Sensing the total drop across both
resistors results in the low transconductance gain
feedback used for track following.
ANo
No
56
VCM_I_SNS2
Sensing across the lower VCM sense resistor for
high transconductance gain feedback for seek
operations.
ANo
No
6
VCM_COMP
VCM compensation network. Typically, 200K
in
series with 100nF is connected from this pin to
Ground.
ANo
No
57
VCM_PLUS
VCM Power Amplifier positive output terminal
A
No
55
VCM_MINUS
VCM Power Amplifier negative output terminal
A
No
46
PARK_V
A resistor conneced between this pin and
VCM_PLUS determines the Parking Voltage
ANo
No
35
VPARKOUT
Output from the retract circuit. This pin is usually
directly connected to the VCM_MINUS.
AO
No
Spindle Driver and DAC
PIN #
PIN NAME
DESCRIPTION
PIN
TYPE
I\O
MAPPED?
TRI-STATE
@SLEEP/@POR
40
SPN_SLEW
The External.Spindle Driver Slew Rate resistor
(Rslew), typically 250K is connected from this pin to
Ground. When in nExternal Slew Rate Mode
(System Control Register B, Bit 10=0), the slew rate
is determined by:
Slew Rate = (0.5V to Rslew) X (DAC slew +1) +20pF
DAC slew = System Control Register bits 7 - 9.
ANo
No
36
SPN_I_COMP A seroies RC network from this pin to ground sets
the spin driver compensation. Typical a single 4nF
capacitor will provide adequate compensation.
ANo
No
14
SPN_I_SNS
A current sensing resistor (2.5K
Typical ).is
connected from this pin to ground. See the Circuit
Operation section for details.
AO
No
20
COIL_A
Spindle Power Amplifier output A. Also serves as
BEMF sensing for Phase A.
ANo
No
25
COIL_B
Spindle Power Amplifier output B. Also serves as
BEMF sensing for Phase B.
ANo
No
29
COIL_C
Spindle Power Amplifier output C. Also serves as
BEMF sensing for Phase C.
ANo
No
59
CTAP
Spindle Motor Center Tap connection
A
No
22
SYNTH_HALL CMOS level spindle speed output. When SYNHALL
(System Control Register B, bit 5) is set to 0, this
output switches state at every zero crossing of any
phase. With SYNHALL = 1, the output only switches
every zero crossing of Phase A.
DO
Yes
37
SPD_COMP
Change Pump RC network connection pin for FLL
mode operation.
ANo
No
38
SPD_COMP_S
HT
This pin allows for shorting of to the Charge Pump
Network resistor. This operation provides a quick
charge on the Charge Pump capacitor, reducing
settling time once desired speed is reached.
Operation is controlled by bit 9 of System Control
Register A.
ANo
No
39
FLL_RES
Frequency Locked Loop charge pump gain resistor.
(Rep), typically 12.5K
, is connected from this pin
to Ground. Change Pump current is determined by:
I = (0.5V to Rcp) X (FLLGAIN DAC +1)
FLLGAIN DAC = System Control Register B bits 0-4
ANo
No
L6260
4/30
相關(guān)PDF資料
PDF描述
L6561I 0.7 A POWER FACTOR CONTROLLER, PDIP8
L6561C 0.7 A POWER FACTOR CONTROLLER, PDIP8
L6561DI 0.7 A POWER FACTOR CONTROLLER, PDSO8
L6561DC 0.7 A POWER FACTOR CONTROLLER, PDSO8
L6562AD 0.8 A POWER FACTOR CONTROLLER, PDSO8
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