![](http://datasheet.mmic.net.cn/370000/L6239_datasheet_16703398/L6239_2.png)
FEATURES
General
POWER UP MICROPROCESSOR RESET
SEQUENCING
- POWER UP RESET AND DELAY
- INTERNAL REGISTER INITIALIZATION
OVERTEMPERATURE PROTECTION
MASKING ON CHIP
COMMUTATION EXTERNALLY CONTROL-
LED
NEGATIVEVOLTAGESUPPORT CIRCUITRY
Interface
SERIAL SYNCHRONOUS
- SCLK, SLOAD, SDIO, R/W
- UP TO 10 MEGABITDATA RATE
Spindle Driver
INTERNAL POWER DEVICES
THREE PHASE BRIDGE PLUS BIPOLAR
DRIVER
- MICROPROCESSOR SPIN-UP & SPEED
CONTROL
- MICROPROCESSOR INITIATED STARTUP
- SPEED COMPENSATION BY EXTERNAL
RC NETWORK
- NO SNUBBERS REQUIRED FOR
CURRENT
LOOPCOMPENSATION OR
EMI CONTROL
- MICROPROCESSOR ACCELERATION
CONTROL VIA DAC (FOR SMOOTH
TRANSITION TO AT SPEEDCONTROL)
- GRAY CODE COUNTER FOR
COMMUTATION CONTROL
(INCREMENTED BY SPIN_CLOCKPIN).
- BEMF DETECTION READABLE FROM
REGISTERS (A,B OR C PHASES) OR PIN
(BEMF_DET).
AUTOMATIC CLAMPING OF OUTPUT TO
PREVENT SUBSTRATE CURRENT
PROGRAMMABLE SLEW RATE CONTROL
(LINEARMODE ONLY)
8 BIT RESOLUTION SPINDLE DAC FOR MI-
CROPROCESSOR
ACCELERATION
TROL
DYNAMIC BRAKING BY COMMAND
CON-
ZERO
CROSSING
DETECTOR
SERIAL
INTERFACE
CONTROL
REGISTER
bemf_det
POR
R/W
LINEAR SLEW RATE
CONTROL &
PWM MONOSTABLE
PWM/Linear
spin_range
PWM/Slew
Vdgtl
THERMAL
SHUTDOWM
NEGATIVE
VOLTAGE
REGULATOR
Vreg_Base
Vreg_Isense
Vreg_Vsense
CHARGE
PUMP
Vpump
Cpump1
Cpump2
D95IN218A
VRef &
Bias
POWER
STAGE
Spin
DAC
AV=4V/V
6-STATE
GRAY CODE
COUNTER
enable_clk
xout, yout, zout
xin, yin, zin
Out B
Out C
Ctr Tap
GND
CSA Input
AGND
SDIO
SLoad
Sclk
PWM Timer
13
24
25
22
27
26
Vanalog
3
+
+
+
-
BEMF
SENSE
bemf_A,B,C
Vpower
Brake
Rsense3
Rsense2
Rsense1
DRV
CNTL
single/multi_
Sequence
Increment
8
Ds7 ..Ds0
To PWM
Monostable
PWM COMP.
+
-
+
-
CSA
Out A
4
5
1
2
41
42
36
44
43
3
23
9
8
11
12
10
6,7,17,29,39,40
38
35
Gate Drive
gm Comp
19
14
15
18
16
31
33
21
34
SYSTEM
CLOCK
20
SYS CLOCK
32
BLOCK DIAGRAM
L6239
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