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參數(shù)資料
| 型號(hào)： | L5991AD |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | PRIMARY CONTROLLER WITH STANDBY |
| 中文描述： | 主控制器具有待機(jī) |
| 文件頁(yè)數(shù)： | 9/19頁(yè) |
| 文件大小： | 192K |
| 代理商： | L5991AD |
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The oscillation frequency can be established with
the aid of thediagrams of fig.13, where R
T
will be
intended as the parallel of R
A
and R
B
in normal
operation and R
T
= R
A
in standby,or considering
the following approximaterelationships:
f
osc
1
C
T
(
0.693
(
R
A
// R
B
) +
K
T
(
1
)
,
which givesthe normaloperatingfrequency,and:
f
SB
1
C
T
(
0.693
R
A
+
K
T
)
(
2
)
,
which gives the standby frequency,that is the one
the converterwill operateat when lightly loaded.
In the aboveexpressions,RA //RB means:
R
A
//
R
B
=
R
A
R
B
R
A
+
R
B
,
while K
T
is definedas:
K
T
=
90 V
15
=
VREF
160
V
15
=
GND
/OPEN
(
3
)
,
and is relatedto the durationof the falling-edge of
the sawtooth:
T
d
≈
30
10
9
+
K
T
C
T
(
4
)
.
T
d
is also the duration of the sync pulses deliv-
ered at pin 1 and definesthe upperextreme of the
duty cycle range, D
x
(see pin 15 for D
X
definition
and calculation) since the output is held low dur-
ing thefalling edge.
In case V15 is connected to VREF, however, the
switching frequencywill be a halfthe values taken
fromfig.13 or resultingfrom (1) and (2).
To prevent the oscillator frequency from switching
back and forth from f
osc
to f
SB
, the ratio f
osc
/ f
SB
mustnot exceed5.5.
If during normal operation the IC is to be synchro-
nized to an external oscillator, R
A
, R
B
and C
T
should be selected for a f
osc
lowerthan the master
frequency in any condition (typically, 10-20% ),
dependingalso on the toleranceof the parts.
Pin 3.
DC (Duty Cycle Control). By biasing this
pin with a voltage between1 and 3 V it is possible
to set the maximum duty cycle between 0 and the
upper extremeD
x
(seepin 15).
If D
max
is the desired maximum duty cycle, the
voltageV3 to be appliedto pin 3 is:
V
3
= 5 - 2
(2-Dmax)
(5)
D
max
is determined by internal comparison be-
tween V3 and the oscillator ramp (see fig. 23),
thus in case the device is synchronized to an ex-
ternal frequency f
ext
(and therefore the oscillator
amplitudeis reduced),(5) changesinto:
V
3
=
5
4
exp
D
max
R
T
C
T
f
ext
(6)
A voltage below 1V will inhibit the driver output
stage.This could be used for a not-latcheddevice
disable, for example in case of overvoltage pro-
tection(see applicationideas).
If no limitation on the maximum duty cycle is re-
quired (i.e. D
MAX
= D
X
), the pin has to be leftfloat-
ing. An internal pull-up (see fig. 23) holds the volt-
age above 3V. Should the pin pick up noise (e.g.
+
-
R2
R3
R1
CLAMP
D1
50
R
A
C
T
D
R
Q
600
μ
A
D97IN729A
V
REF
RCT
SYNC
CLK
2
4
1
16
ST-BY
R
B
STANDBY
Figure 22. Oscillatorand synchronization internalschematic.
L5991 - L5991A
9/23
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| L5991D013TR | 功能描述:電流型 PWM 控制器 Prog Current Mode RoHS:否 制造商:Texas Instruments 開(kāi)關(guān)頻率:27 KHz 上升時(shí)間: 下降時(shí)間: 工作電源電壓:6 V to 15 V 工作電源電流:1.5 mA 輸出端數(shù)量:1 最大工作溫度:+ 105 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-14 |
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