參數(shù)資料
型號: L5989D
廠商: STMICROELECTRONICS
元件分類: 穩(wěn)壓器
英文描述: 5.06 A SWITCHING REGULATOR, 1000 kHz SWITCHING FREQ-MAX, PDSO16
封裝: ROHS COMPLIANT, HTSSOP-16
文件頁數(shù): 10/51頁
文件大小: 1947K
代理商: L5989D
Functional description
L5989D
18/51
Doc ID 15778 Rev 3
During normal operation the CSS is discharged with a constant current of 22 μA (typ.) only if:
HICCUP mode is triggered (see Chapter 5.5.2)
the input voltage goes below the UVLO threshold (see Chapter 5.5.3)
the internal temperature is over 150°C (see Chapter 5.5.4)
A new SS cycle will start when the VSS drops below the INH threshold.
New high performance ICs often require more than one supply voltage. Most of these
applications require well defined start-up sequencing, in order to avoid potential damage
and latch-up of the processing core. Sharing the same soft-start capacitor for a set of
regulators, the output voltages increase with the same slew rate implementing a
“simultaneous start-up” sequencing method.
5.5
Monitoring and protections
5.5.1
Overvoltage
The device provides the overvoltage protection monitoring the output voltage through the FB
pin. If the voltage sensed on FB pin reaches a value 20% (typ.) greater than the reference of
the error amplifier, the low-side MOSFET is turned on to discharge as fast as possible the
output capacitor. It is possible to set two different behaviors in case of OVP:
In case the OVP latched mode is active (see Chapter 5.1), the internal oscillator is
suspended and the low side switch will be kept on until the input voltage goes below the
selected UVLO threshold or the SS/INH pin is forced below the INH threshold.
In case of NOT latched OVP mode is active, the low side MOS is forced ON until the
feedback voltage is higher than the OVP threshold (20% greater than the reference of
the error amplifier).
Figure 8.
OVP not latched
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