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參數(shù)資料
| 型號： | L4922 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Very Lowdrop Adjustable Regulators(帶復(fù)位的低壓差穩(wěn)壓器) |
| 中文描述： | 非常Lowdrop可調(diào)穩(wěn)壓器（帶復(fù)位的低壓差穩(wěn)壓器） |
| 文件頁數(shù)： | 3/6頁 |
| 文件大?。?/td> | 80K |
| 代理商： | L4922 |
ELECTRICAL CHARACTERISTICS
(V
i
= 14. 4V, – 40
°
C
≤
T
J
≤
+ 125
°
C unlessotherwisespecified)
Symbol
V
i
V
o
Parameter
Test Conditions
(*) Note 1
I
o
= 0mA to 1A
T
J
= 25
°
C
V
i
= 6 to 26V;
I
o
= 700mA
f = 120Hz; C
o
= 47
μ
F
V
i
= 12V
dc
+ 5V
pp
I
o
= 10mA to 1A
T
J
= 25
°
C, I
O
= 1A
Over Full T, I
o
= 1A
I
o
= 10mA
I
o
= 1A
Min.
6
4.8
4.9
Typ.
Max.
26
5.2
5.1
25
Unit
V
V
V
mV
dB
Operating Input Voltage
Output Voltage
V
Line
SVR
Line Regulation
Supply Voltage Rejection
I
O
= 10mA
5
55
V
LOAD
V
i
– V
o
Load Regulation
Dropout Voltage
15
0.45
50
0.70
0.90
12
70
mV
V
V
mA
mA
A
V
V
V
I
q
Quiescent Current
7
25
I
SC
V
R
Short Circuit Current
Rset Output Saturation Voltage
1.8
1.5V < V
O
< V
RT (off)
, I
R
= 1.6mA
3V < V
O
< V
RT (off)
, I
R
= 8mA
1K
Reset Pull-up to V
O
0.40
0.40
1.0
V
RT peak
Power On-Off Reset out Peak
Voltage
Reset Output Leakage Current
(high level)
Reset Pulse Delay Time
Power OFF V
o
Threshold
0.65
I
R
V
o
in Regul.
V
R
= 5V
C
D
= 100nF
V
o
@ Reset out H to L
Transition; T
J
= 25
°
C
– 40
°
C
≤
T
J
≤
+ 125
°
C
V
4
= 3V
50
μ
A
t
D
20
ms
V
RthOFF
4.75
4.70
V
o
–0.15
V
V
μ
A
I
C6
Delay Capacitor Charging
Current (current generator)
Power ON V
o
Threshold
20
V
RthON
V
o
@ Reset out L to H
Transition
Resetout = ”1” H to L Transition
Resetout = ”0” L to H Transition
V
rthOFF
+ 0.03V
V
o
–
0.04V
3.8
4.4
V
V
4
Delay Comparator Threshold
3.2
3.7
V
V
4
V
6H
Delay Comparator Hysteresis
500
mV
(*) Note1 :
The device is not operating within the range : 26 V <V
i
< 37 V.
EXTERNAL COMPENSATION
Sincethepurposeof avoltageregulatoristo supply
a fixed output voltage in spite of supply and load
variations,the open loopgainof the regulatormust
be veryhighatlowfrequencies.Thismaycausein-
stability as a resultof the variouspoles present in
the loop. To avoid this instability dominant pole
compensation is used to reduce phase shifts due
tootherpolesattheunitygainfrequency.Thelower
the frequency of these other poles, the greater
mustbe the capacitor used to create the dominant
pole for the sameDC gain.
Where the output transistor is a lateral PNP type
there is a pole in the regulation loop at a frequency
too low to be compensatedby acapacitorwich can
be integrated. An external compensation is there-
fore necessaryso a very high valuecapacitormust
be connectedfrom the output to ground.
The parassitic equivalent series resistance of the
capacitor used adds a zero to the regulation loop.
This zero may compromise the stabilityof the sys-
temsince its effect tendsto cancel the effectof the
poleadded.InregulatorsthisESRmustbelessthan
3
and theminimum capacitor value is 47
μ
F.
L4922
3/6
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| L4923 | Low Drop Regulator With Reset and Inhibit(帶禁止和復(fù)位的低壓差穩(wěn)壓器) |
| L4925 | Very Low Drop Voltage Regulator(低壓差穩(wěn)壓器) |
| L4931 | Very Low Drop Voltage Regulators with Inhibit(帶禁止低壓差電壓穩(wěn)壓器) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| L4923 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:WITH RESET AND INHIBIT 5V.1A VERY LOW DROP REGULATOR |
| L4925 | 功能描述:低壓差穩(wěn)壓器 - LDO 5V 0.5A w/Reset RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| L4925H | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Positive Fixed Voltage Regulator |
| L4925L | 功能描述:低壓差穩(wěn)壓器 - LDO V Low-Drop Volt Reg RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| L4925PD | 功能描述:低壓差穩(wěn)壓器 - LDO 5V 0.5A w/Reset RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
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