參數(shù)資料
型號(hào): L320ML12PI
廠商: Advanced Micro Devices, Inc.
英文描述: 32 Megabit (2 M x 16-Bit/4 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O⑩ Control
中文描述: 32兆位(2米× 16位/ 4米× 8位)的MirrorBit⑩3.0伏特,只有統(tǒng)一閃存部門與VersatileI /輸出⑩控制
文件頁(yè)數(shù): 45/59頁(yè)
文件大小: 657K
代理商: L320ML12PI
January31,2007 26517B4
Am29LV320MH/L
43
D A T A S H E E T
AC CHARACTERISTICS
Erase and Program Operations
Notes:
1.
2.
Not 100% tested.
See the
“Erase And Programming Performance”
section for more
information.
For 1–16 words/1–32 bytes programmed.
Effective write buffer specification is based upon a
16-word/32-byte write buffer operation.
Word/Byte programming specification is based upon a single
word/byte programming operation not utilizing the write buffer.
3.
4.
5.
6.
AC specifications listed are tested with V
= V
CC
. Contact AMD
for information on AC operation with V
IO
V
CC.
When using the program suspend/resume feature, if the suspend
command is issued within t
POLL
, t
POLL
must be fully re-applied
upon resuming the programming operation. If the suspend
command is issued after t
POLL
, t
POLL
is not required again prior to
reading the status bits upon resuming.
7.
Parameter
Speed Options
JEDEC
Std.
Description
90R
101,
101R
112,
112R
120,
120R
Unit
t
AVAV
t
WC
Write Cycle Time (Note 1)
Min
90
100
110
120
ns
t
AVWL
t
AS
Address Setup Time
Min
0
ns
t
ASO
Address Setup Time to OE# low during toggle bit polling
Min
15
ns
t
WLAX
t
AH
Address Hold Time
Min
45
ns
t
AHT
Address Hold Time From CE# or OE# high
during toggle bit polling
Min
0
ns
t
DVWH
t
DS
Data Setup Time
Min
45
ns
t
WHDX
t
DH
Data Hold Time
Min
0
ns
t
OEPH
Output Enable High during toggle bit polling
Min
20
ns
t
GHWL
t
GHWL
Read Recovery Time Before Write (OE# High to WE# Low)
Min
0
ns
t
ELWL
t
CS
CE# Setup Time
Min
0
ns
t
WHEH
t
CH
CE# Hold Time
Min
0
ns
t
WLWH
t
WP
Write Pulse Width
Min
35
ns
t
WHDL
t
WPH
Write Pulse Width High
Min
30
ns
t
WHWH1
t
WHWH1
Write Buffer Program Operation (Notes 2, 3)
Typ
240
μs
Effective Write Buffer Program Operation
(Notes 2, 4)
Per Byte
Typ
7.5
μs
Per Word
Typ
15
μs
Accelerated Effective Write Buffer Program
Operation (Notes 2, 5)
Per Byte
Typ
6.25
μs
Per Word
Typ
12.5
μs
Single Word/Byte Program Operation
(Notes 2, 5)
Byte
Typ
60
μs
Word
60
Accelerated Single Word/Byte
Programming Operation (Note 2)
Byte
Typ
54
μs
Word
54
t
WHWH2
t
WHWH2
Sector Erase Operation (Note 2)
Typ
0.5
sec
t
VHH
V
HH
Rise and Fall Time (Note 1)
Min
250
ns
t
VCS
V
CC
Setup Time (Note 1)
Min
50
μs
t
BUSY
WE# to RY/BY#
Max
90
100
110
120
ns
t
POLL
Program Valid Before Status Polling
(Note 7)
Max
4
μs
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