- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄4594 > KSZ8993MI (Micrel Inc)IC SWITCH 10/100 W/TXRX 128PQFP PDF資料下載
| 型號： | KSZ8993MI |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 33/86頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH 10/100 W/TXRX 128PQFP |
| 標(biāo)準(zhǔn)包裝： | 66 |
| 系列： | * |
| 類型： | * |
| 應(yīng)用： | * |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-BFQFP |
| 供應(yīng)商設(shè)備封裝： | 128-PQFP（14x20） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 1081 (CN2011-ZH PDF) |
| 其它名稱： | 576-2124 KSZ8993MI-ND |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁當(dāng)前第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁
Micrel, Inc.
KSZ8993M/ML
October 2008
39
M9999-020606
Rate Limiting Support
The KSZ8993M supports hardware rate limiting independently on the “receive side” and on the “transmit side” on
a per port basis. Rate limiting is supported in both priority and non-priority environment. The rate limit starts from
0 kbps and goes up to the line rate in steps of 32 kbps. The KSZ8993M uses “one second” as the rate limiting
interval. At the beginning of each interval, the counter is cleared to zero, and the rate limit mechanism starts to
count the number of bytes during the interval.
On the “receive side”, if the number of bytes exceeds the programmed limit, the switch will stop receiving packets
on the port until the “one second” interval expires. Flow control can be enabled to prevent packet loss. If the rate
limit is programmed greater than or equal to 128 kbps and the byte counter is 8 Kbytes below the limit, flow
control will be triggered. If the rate limit is programmed lower than 128 kbps and the byte counter is 2 Kbytes
below the limit, flow control will also be triggered.
On the “transmit side”, if the number of bytes exceeds the programmed limit, the switch will stop transmitting
packets on the port until the “one second” interval expires.
If priority is enabled, the KSZ8993M can be programmed to support different rate limits for high priority packets
and low priority packets.
Configuration Interface
The KSZ8993M can operate as both a managed switch and an unmanaged switch.
In unmanaged mode, the KSZ8993M is typically programmed using an EEPROM. If no EEPROM is present, the
KSZ8993M is configured using its default register settings. Some defaults settings are configured via strap-in pin
options. The strap-in pins are indicated in the “KSZ8993M Pin Description and I/O Assignment” table.
I
2C Master Serial Bus Configuration
With an additional I
2C (“2-wire”) EEPROM, the KSZ8993M can perform more advanced switch features like
“broadcast storm protection” and “rate control” without the need of an external processor.
For KSZ8993M I
2C Master configuration, the EEPROM stores the configuration data for register 0 to register 109
(as defined in the KSZ8993M register map) with the exception of the “Read Only” status registers. After the de-
assertion of reset, the KSZ8993M will sequentially read in the configuration data for all 110 registers, starting from
register 0. The configuration access time (tprgm) is less than 15 ms, as depicted in the following figure.
....
RST_N
SCL
SDA
t
prgm<15 ms
Figure 7. KSZ8993M EEPROM Configuration Timing Diagram
The following is a sample procedure for programming the KSZ8993M with a pre-configured EEPROM:
1.
Connect the KSZ8993M to the EEPROM by joining the SCL and SDA signals of the respective devices. For
the KSZ8993M, SCL is pin 97 and SDA is pin 98.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LFEC6E-3TN144C | IC FPGA 6.1KLUTS 144TQFP |
| LFXP3E-5T144C | IC FPGA 3.1KLUTS 100I/O 144-TQFP |
| LFXP3E-4T144I | IC FPGA 3.1KLUTS 100I/O 144-TQFP |
| LFXP3C-5T144C | IC FPGA 3.1KLUTS 100I/O 144-TQFP |
| LFXP3C-4T144I | IC FPGA 3.1KLUTS 100I/O 144-TQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KSZ8993ML | 功能描述:以太網(wǎng) IC 2+1 Port 10/100 Switch w/Tranceivers & Frame Buffers, 128-Ld PQFP(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8993ML-EVAL | 功能描述:以太網(wǎng)開發(fā)工具 KSZ8993ML Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
| KSZ8993MLI | 功能描述:以太網(wǎng) IC 2+1 Port 10/100 Switch w/Tranceivers & Frame Buffers, 128-Ld PQFP(Lead Free, I-Temp) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8995FQ | 功能描述:以太網(wǎng) IC Integrated 5-Port Switch with Fiber on Port 3 & 4, Lead free RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8995FQ-EVAL | 功能描述:以太網(wǎng)開發(fā)工具 Integrated 5-Port Switch with Fiber on Port 3 & 4 Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。