參數(shù)資料
型號(hào): KSZ8863MLL-EVAL
廠商: Micrel Inc
文件頁(yè)數(shù): 9/106頁(yè)
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR KSZ8863MLL
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,以太網(wǎng) PHY
嵌入式:
已用 IC / 零件: KSZ8863MLL
已供物品:
相關(guān)產(chǎn)品: 576-3751-ND - IC ETHERNET SWITCH 3PORT 48-LQFP
576-3577-ND - IC ETHERNET SW 3PORT 48-LQFP
其它名稱: 576-3867
PIC18FXX2
DS39564C-page 104
2006 Microchip Technology Inc.
FIGURE 10-1:
TIMER0 BLOCK DIAGRAM IN 8-BIT MODE
FIGURE 10-2:
TIMER0 BLOCK DIAGRAM IN 16-BIT MODE
Note:
Upon RESET, Timer0 is enabled in 8-bit mode with clock input from T0CKI max. prescale.
RA4/T0CKI pin
T0SE
0
1
0
T0CS
FOSC/4
Programmable
Prescaler
Sync with
Internal
Clocks
TMR0L
(2 TCY delay)
Data Bus
8
PSA
T0PS2, T0PS1, T0PS0
Set Interrupt
Flag bit TMR0IF
on Overflow
3
Note:
Upon RESET, Timer0 is enabled in 8-bit mode with clock input from T0CKI max. prescale.
T0CKI pin
T0SE
0
1
0
T0CS
FOSC/4
Programmable
Prescaler
Sync with
Internal
Clocks
TMR0L
(2 TCY delay)
Data Bus<7:0>
8
PSA
T0PS2, T0PS1, T0PS0
Set Interrupt
Flag bit TMR0IF
on Overflow
3
TMR0
TMR0H
High Byte
8
Read TMR0L
Write TMR0L
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