參數(shù)資料
型號： KSZ8041RNL-EVAL
廠商： Micrel Inc
文件頁數(shù)： 19/54頁
文件大?。?/td> 0K
描述： BOARD EVALUATION FOR KSZ8041RNL
標準包裝： 1
主要目的： 接口，以太網(wǎng) PHY
嵌入式： 否
已用 IC / 零件： KSZ8041RNL
主要屬性： 單芯片 PHY，10BASE-T/100BASE-TX
已供物品： 板
相關產(chǎn)品： 576-3979-2-ND - IC TXRX PHY 10/100 3.3V 32MLF
576-3745-6-ND - TXRX PHY 100BASE TX 3.3V 32QFN
576-3745-1-ND - TXRX PHY 100BASE TX 3.3V 32QFN
576-3745-2-ND - TXRX PHY 100BASE TX 3.3V 32QFN
576-3623-6-ND - TXRX PHY 10-T/100-TX 3.3V 32MLF
576-3623-1-ND - TXRX PHY 10-T/100-TX 3.3V 32MLF
576-3623-2-ND - TXRX PHY 10-T/100-TX 3.3V 32MLF
576-3503-ND - TXRX 10/100 3.3V PHY RMII 32-MLF
其它名稱： 576-3863
Micrel, Inc.
KSZ8041NL/RNL
September 2010
26
M9999-090910-1.4
RMII Signal Definition
The Tables 3 and 4 describe the RMII signals for KSZ8041NL and KSZ8041RNL. Refer to RMII Specification for detailed
information.
RMII
Signal Name
Direction
(with respect to PHY,
KSZ8041NL signal)
Direction
(with respect to MAC)
Description
REF_CLK
Input
Input, or Output
Synchronous 50 MHz clock reference for
receive, transmit and control interface
TX_EN
Input
Output
Transmit Enable
TXD[1:0]
Input
Output
Transmit Data [1:0]
CRS_DV
Output
Input
Carrier Sense/Receive Data Valid
RXD[1:0]
Output
Input
Receive Data [1:0]
RX_ER
Output
Input, or (not required)
Receive Error
Table 3. RMII Signal Description – KSZ8041NL
RMII
Signal Name
Direction
(with respect to PHY,
KSZ8041RNL signal)
Direction
(with respect to MAC)
Description
REF_CLK
Output
Input
Synchronous 50 MHz clock reference for
receive, transmit and control interface
TX_EN
Input
Output
Transmit Enable
TXD[1:0]
Input
Output
Transmit Data [1:0]
CRS_DV
Output
Input
Carrier Sense/Receive Data Valid
RXD[1:0]
Output
Input
Receive Data [1:0]
RX_ER
Output
Input, or (not required)
Receive Error
Table 4. RMII Signal Description – KSZ8041RNL
Reference Clock (REF_CLK)
REF_CLK is a continuous 50MHz clock that provides the timing reference for TX_EN, TXD[1:0], CRS_DV, RXD[1:0], and
RX_ER.
The KSZ8041NL inputs the 50MHz REF_CLK from the MAC or system board.
The KSZ8041RNL generates the 50MHz RMII REF_CLK and outputs it to the MAC.
Transmit Enable (TX_EN)
TX_EN indicates that the MAC is presenting di-bits on TXD[1:0] for transmission. It is asserted synchronously with the first
nibble of the preamble and remains asserted while all di-bits to be transmitted are presented on the RMII, and is negated
prior to the first REF_CLK following the final di-bit of a frame.
TX_EN transitions synchronously with respect to REF_CLK.
Transmit Data [1:0] (TXD[1:0])
TXD[1:0] transitions synchronously with respect to REF_CLK. When TX_EN is asserted, TXD[1:0] are accepted for
transmission by the PHY. TXD[1:0] is ”00” to indicate idle when TX_EN is de-asserted. Values other than “00” on TXD[1:0]
while TX_EN is de-asserted are ignored by the PHY.
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相關代理商/技術參數(shù)
參數(shù)描述
KSZ8041RNLI 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:10Base-T/100Base-TX Physical Layer Transceiver
KSZ8041RNLI TR 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver with RMII Support (Industrial grade) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8041RNLI TR-SAMPLE 制造商:Micrel Inc 功能描述:
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KSZ8041RNLTR 制造商:Micrel 功能描述:Physical Layer Transceiver
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