參數(shù)資料
型號(hào)： KSZ8031RNL-EVAL
廠商： Micrel Inc
文件頁(yè)數(shù)： 4/43頁(yè)
文件大小： 0K
描述： BOARD EVALUATION FOR KSZ8031RNL
標(biāo)準(zhǔn)包裝： 1
主要目的： 接口，以太網(wǎng) PHY
嵌入式： 否
已用 IC / 零件： KSZ8031RNL
已供物品： 板
相關(guān)產(chǎn)品： 576-3843-6-ND - TXRX PHY 100BASE TX 3.3V 24QFN
576-3843-1-ND - TXRX PHY 100BASE TX 3.3V 24QFN
576-3788-ND - TXRX PHY 10/100 3.3V 24-QFN
576-3843-2-ND - TXRX PHY 100BASE TX 3.3V 24QFN
576-3741-5-ND - TXRX PHY 100BASE TX 3.3V 24QFN
其它名稱： 576-3862
Micrel, Inc.
KSZ8021RNL / KSZ8031RNL
August 2010
12
M9999-082710-1.0
Functional Description: 10Base-T/100Base-TX Transceiver
The KSZ8031RNL is an integrated single 3.3V supply Fast Ethernet transceiver. It is fully compliant with the IEEE 802.3
Specification. It reduces board cost and simplifies board layout by using on-chip termination resistors for the two
differential pairs and by integrating the regulator to supply the 1.2V core.
On the copper media side, the KSZ8031RNL supports 10Base-T and 100Base-TX for transmission and reception of data
over a standard CAT-5 unshielded twisted pair (UTP) cable, and HP auto MDI/MDI-X for reliable detection of and
correction for straight-through and crossover cables.
On the MAC side, the KSZ8031RNL provides the Reduced Media Independent Interface (RMII) for direct connection with
RMII-compliant Ethernet MAC processors and switches.
The MII management bus option gives the MAC processor complete access to the KSZ8031RNL control and status
registers. Additionally, an interrupt pin eliminates the need for the processor to poll for PHY status change.
As the power-up default, the KSZ8031RNL uses a 25MHz crystal to generate all required clocks, including the 50MHz
RMII reference clock output for the MAC. The KSZ8021RNL is the version which takes in the 50MHz RMII reference clock
as the power-up default.
The KSZ8021/31RNL is used to refer to both KSZ8021RNL and KSZ8031RNL versions in this data sheet.
100Base-TX Transmit
The 100Base-TX transmit function performs parallel-to-serial conversion, 4B/5B encoding, scrambling, NRZ-to-NRZI
conversion, and MLT3 encoding and transmission.
The circuitry starts with a parallel-to-serial conversion, which converts the MII data from the MAC into a 125MHz serial bit
stream. The data and control stream is then converted into 4B/5B coding and followed by a scrambler. The serialized data
is further converted from NRZ-to-NRZI format, and then transmitted in MLT3 current output. The output current is set by
an external 6.49k
Ω 1% resistor for the 1:1 transformer ratio.
The output signal has a typical rise/fall time of 4ns and complies with the ANSI TP-PMD standard regarding amplitude
balance, overshoot, and timing jitter. The wave-shaped 10Base-T output is also incorporated into the 100Base-TX
transmitter.
100Base-TX Receive
The 100Base-TX receiver function performs adaptive equalization, DC restoration, MLT3-to-NRZI conversion, data and
clock recovery, NRZI-to-NRZ conversion, de-scrambling, 4B/5B decoding, and serial-to-parallel conversion.
The receiving side starts with the equalization filter to compensate for inter-symbol interference (ISI) over the twisted pair
cable. Since the amplitude loss and phase distortion is a function of the cable length, the equalizer must adjust its
characteristics to optimize performance. In this design, the variable equalizer makes an initial estimation based upon
comparisons of incoming signal strength against some known cable characteristics, and then tunes itself for optimization.
This is an ongoing process and self-adjusts against environmental changes such as temperature variations.
Next, the equalized signal goes through a DC restoration and data conversion block. The DC restoration circuit is used to
compensate for the effect of baseline wander and to improve the dynamic range. The differential data conversion circuit
converts the MLT3 format back to NRZI. The slicing threshold is also adaptive.
The clock recovery circuit extracts the 125MHz clock from the edges of the NRZI signal. This recovered clock is then used
to convert the NRZI signal into the NRZ format. This signal is sent through the de-scrambler followed by the 4B/5B
decoder. Finally, the NRZ serial data is converted to the MII format and provided as the input data to the MAC.
10Base-T Transmit
The 10Base-T drivers are incorporated with the 100Base-TX drivers to allow for transmission using the same magnetic.
The drivers perform internal wave-shaping and pre-emphasis, and output 10Base-T signals with a typical amplitude of
2.5V peak. The 10Base-T signals have harmonic contents that are at least 27dB below the fundamental frequency when
driven by an all-ones Manchester-encoded signal.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KSZ8031RNLI 功能描述:TXRX PHY 10/100 3.3V 24-QFN RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,140 系列:AU 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):1/1 規(guī)程:CAN 電源電壓:5.3 V ~ 27 V 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SO 包裝:管件 其它名稱:935267940512AU5790D14AU5790D14-ND
KSZ8031RNLI TR 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver w/ RMII Support (24-QFN, Industrial Grade) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8031RNLITR 制造商:Micrel Inc 功能描述:Ethernet transceiver,PHY,RMII,QFN24
KSZ8031RNLI-TR 功能描述:1/1 Transceiver Full RMII 24-QFN (4x4) 制造商:microchip technology 系列:- 包裝:剪切帶（CT） 零件狀態(tài):過(guò)期 類型:收發(fā)器 協(xié)議:RMII 驅(qū)動(dòng)器/接收器數(shù):1/1 雙工:全 接收器滯后:- 數(shù)據(jù)速率:- 電壓 - 電源:1.8V，2.5V，3.3V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤(pán) 供應(yīng)商器件封裝:24-QFN（4x4） 標(biāo)準(zhǔn)包裝:1
KSZ8031RNL-TR 功能描述:1/1 Transceiver Full RMII 24-QFN (4x4) 制造商:microchip technology 系列:- 包裝:剪切帶（CT） 零件狀態(tài):過(guò)期 類型:收發(fā)器 協(xié)議:RMII 驅(qū)動(dòng)器/接收器數(shù):1/1 雙工:全 接收器滯后:- 數(shù)據(jù)速率:- 電壓 - 電源:1.8V，2.5V，3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤(pán) 供應(yīng)商器件封裝:24-QFN（4x4） 標(biāo)準(zhǔn)包裝:1
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