參數(shù)資料
型號： KS8993ML
廠商： Micrel Inc
文件頁數(shù)： 50/85頁
文件大小： 0K
描述： IC SWITCH 10/100 3PORT 128PQFP
標準包裝： 66
系列： *
類型： *
應(yīng)用： *
安裝類型： 表面貼裝
封裝/外殼： 128-BFQFP
供應(yīng)商設(shè)備封裝： 128-PQFP（14x20）
包裝： 散裝
配用： 576-1016-ND - BOARD EVAL FOR KS8993ML
其它名稱： 576-1015
Micrel, Inc.
KS8993M/ML/MI
April 2005
54
M9999-041205
Port Registers
The following registers are used to enable features that are assigned on a per port basis. The register bit
assignments are the same for all ports, but the address for each port is different, as indicated.
Register 16 (0x10): Port 1 Control 0
Register 32 (0x20): Port 2 Control 0
Register 48 (0x30): Port 3 Control 0
Bit
Name
R/W
Description
Default
7
Broadcast
storm
protection
enable
R/W
= 1, enable broadcast storm protection for
ingress packets on the port
= 0, disable broadcast storm protection
0
6
DiffServ priority
classification
enable
R/W
= 1, enable DiffServ priority classification for
ingress packets on port
= 0, disable DiffServ function
0
5
802.1p priority
classification
enable
R/W
= 1, enable 802.1p priority classification for
ingress packets on port
= 0, disable 802.1p
Pin value during
reset:
P1_1PEN (port
1)
P2_1PEN (port
2)
P3_1PEN (port
3)
4
Port-based
priority
classification
enable
R/W
= 1, ingress packets on the port will be classified
as high priority if “DiffServ” or “802.1p”
classification is not enabled or fails to classify.
= 0, ingress packets on port will be classified as
low priority if “DiffServ” or “802.1p” classification
is not enabled or fails to classify.
Note: “DiffServ”, “802.1p” and port priority can be
enabled at the same time. The OR’ed result of
802.1p and DSCP overwrites the port priority.
Pin value during
reset:
P1_PP (port 1)
P2_PP (port 2)
P3_PP (port 3)
3
User priority
ceiling
R/W
= 1, if the packet’s “user priority field” is greater
than the “user priority field” in the port default tag
register, replace the packet’s “user priority field”
with the “user priority field” in the port default tag
register.
= 0, do not compare and replace the packet’s
‘user priority field”
0
2
Tag insertion
R/W
= 1, when packets are output on the port, the
switch will add 802.1p/q tags to packets without
802.1p/q tags when received. The switch will not
add tags to packets already tagged. The tag
inserted is the ingress port’s “port VID”.
= 0, disable tag insertion
Pin value during
reset:
P1_TAGINS
(port 1)
P2_TAGINS
(port 2)
P3_TAGINS
(port 3)
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