參數(shù)資料
型號: KS88C0116
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 8-Bit CMOS Microcontroller(8位 CMOS 微控制器)
中文描述: 8位CMOS微控制器(8位的CMOS微控制器)
文件頁數(shù): 5/6頁
文件大小: 36K
代理商: KS88C0116
PRODUCT SPECIFICATION
KS88C0116 MICROCONTROLLER
ELECTRONICS
S
MSUNG
2–5
June 1996
Table 1. KS88C0116 Pin Descriptions
Pin
Name
Pin
Type
I/O
Pin
Description
Circuit
Number
1
SDIP Pin
Number
8–1
Share
Pins
A8–A15
P0.0–P0.7
I/O port with nibble-programmable pins;
Schmitt trigger input or push-pull, open-
drain output and software assignable pull-
ups; also configurable as external interface
address lines A8–A15.
Same general characteristics as port 0; also
configurable as external interface
address/data lines AD0–AD7.
I/O port with Schmitt trigger input (P2.0–
P2.3 only) or push-pull output. Lower nibble
pins 0–3 are configurable for external
interface signals; upper nibble pins 4–7 are
bit-programmable for external interrupts
INT0–INT3. P2.4 can also be used for
external
WAIT
input.
I/O port with bit-programmable pins; Schmitt
trigger input or push-pull output. Alternate
functions include software-selectable UART
transmit and receive on pins 3.7 and 3.6,
timer B and timer A outputs at pins 3.5 and
3.4, and timer D and C clock inputs at pins
3.1 and 3.0.
I/O port with bit-programmable pins; Schmitt
trigger input or push-pull output; software-
assignable pull-ups. Alternate functions
include external interrupt inputs INT4–INT11
(with interrupt enable and pending control)
and timer C and D gate input at P4.0 and
P4.1.
I/O port with nibble-programmable pins;
Schmitt trigger input or push-pull, open-
drain output; software-assignable pull-ups.
N-channel, open-drain output pins;
up to 9-volt capacity
Bi-directional serial data input pin
Serial data output pin
Timer A and B output pins
Timer C and D external clock input pins
External interrupts. I/O pin 2.4 (share pin
with INT0) is also configurable as a
WAIT
signal input pin for the external interface.
P1.0–P1.7
I/O
1
63–56
AD0–AD7
P2.0–P2.3
P2.4–P2.7
I/O
2 (lower
nibble);
3 (upper
nibble; with
noise filter)
42–39;
38–35
AS
,
DS
,
DM
, R/
W
;
INT0–INT3,
WAIT
P3.0–P3.7
I/O
4
25–18
TCCK,
TDCK, TA,
TB, TxD,
RxD
P4.0–P4.7
I/O
5
(with
noise filter)
16–9
INT4–
INT11;
TCG, TDG
P5.0–P5.5
I/O
1
44–49
P6.0–P6.7
O
6
26–31,
33–34
18
19
21, 20
25, 24
38–35
RxD
TxD
TA, TB
TCCK, TDCK
INT0–INT3
I/O
I/O
I/O
I/O
I/O
4
4
3
P3.7
P3.6
P3.4, P3.5
P3.0, P3.1
P2.4–P2.7
(with noise
filter)
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