參數(shù)資料
型號(hào): KS8630D
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: ENHANCED CALLING LINE IDENTIFIER WITH CALL WAITING
中文描述: 增強(qiáng)電話線呼叫等待標(biāo)識(shí)符
文件頁(yè)數(shù): 18/23頁(yè)
文件大小: 258K
代理商: KS8630D
KS8630D
ENHANCED CALLING LINE IDENTIFIER WITH CALL WAITING
18
PRELIMINARY
The 2130Hz and 2750Hz components of the tone alert signal are transmitted simultaneously and the
10
is
continously repeated for the Channel seizure signal. The MARK signal is composed of continuous
1
, and the
message is consists of the start bit (
0
), 8-bit real data, stop bit (
1
) and inserted dummy Mark bit (0~20 bit).
A low edge pulse is generated into the INTB pin if KS8630D detects a Line polarity reversal.
Then the Microcontroller must detect this signal and put the PD pin into the Low State level.
Must be careful when the Microcontroller detects the end of FSK data or if the FSK data is not detected during the
set amount of time , so that the PD (pin # 8) of KS8630D becomes re-initialized back to Power Down Mode ( high
state).
Bellcore system
In the On-Hook state, the Bellcore protocol does not send the Dual Tone CPE Alerting Signal. For more detailed
information, please refer to Bellcore specification : GR-30-CORE, and SR-TSV-002476.
Figure 18. Bellcore On-Hook System Signals
For the Channel seizure signal, the
10
is continously repeated. The MARK signal is composed of continuous
1
,
and the message is consists of the start bit (
0
), 8-bit data, stop bit (
1
) and inserted dummy Mark bit (0~20 bit).
When KS8630D detects the end of ringing signal, the INTB ( pin # 14) generates a low edge pulse.
The Microcontroller detects this signal and sets the PD( pin # 8) to low state level.
Must be careful when the Microcontroller detects the end of FSK data or if FSK data is not detected during the set
amount of time (approximately 500ms), so that that the KS8630D
s PD( pin # 8) becomes re-initialized back to
Power Down Mode (high state).
1'st Ring
Channel
Seizure
MARK
Message
Typically 2sec
250ms
150ms
2'nd Ring
Line Signal
RD
RTB
INTB
T
INTD1
T
MKINT
PD
250~500ms
200ms
Max 2.9~3.7sec
T
INTPD
T
MSGPD
DATA
DCLK
clock
T
INTD2
data
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