參數(shù)資料
型號: KS57P2308
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 4-BIT CMOS Microcontroller(4位微控制器)
中文描述: 4位CMOS微控制器(4位微控制器)
文件頁數(shù): 6/6頁
文件大小: 36K
代理商: KS57P2308
PRODUCT OVERVIEW
KS57C2308/P2308/C2316/P2316
1-
6
Table 1-1. KS57C2308/C2316 Pin Descriptions (Continued)
Pin Name
Pin
Type
I/O
Description
Number
Share
Pin
P3.1
Reset
Value
Input
Circuit
Type
D
LCDSY
LCD synchronization clock output for LCD
display expansion
External clock input for timer/counter 0
Timer/counter 0 clock output
Serial interface data input
Serial interface data output
33
TCL0
TCLO0
SI
SO
I/O
I/O
I
I/O
27
28
23
22
P1.3
P2.0
P0.3
P0.2
Input
Input
Input
Input
A-1
D
A-1
D
*
D
*
A-1
SCK
I/O
Serial I/O interface clock signal
21
P0.1
Input
INT0
INT1
I
External interrupts. The triggering edge for
INT0 and INT1 is selectable. Only INT0 is
synchronized with the system clock.
Quasi-interrupt with detection of rising edge
signals.
External interrupt input with detection of rising
or falling edge
Quasi-interrupt inputs with falling edge
detection.
CPU clock output
2, 4, 8 or 16 kHz frequency output for buzzer
sound with 4.19 MHz main system clock or
32.768 kHz subsystem clock.
Crystal, ceramic or RC oscillator pins for main
system clock. (For external clock input, use
X
IN
and input X
IN
‘ s reverse phase to X
OUT
)
Crystal oscillator pins for subsystem clock.
(For external clock input, use XT
IN
and input
XT
IN
's reverse phase to XT
OUT
)
Main power supply
24
25
P1.0
P1.1
Input
INT2
I
26
P1.2
Input
A-1
INT4
I
20
P0.0
Input
A-1
KS0–KS7
I/O
44–51
P6.0–P7.3
Input
D
*
CLO
BUZ
I/O
I/O
30
31
P2.2
P2.3
Input
Input
D
D
X
IN,
X
OUT
15,14
XT
IN,
XT
OUT
17,18
V
DD
V
SS
12
Ground
13
RESET
TEST
Reset signal
Test signal input (must be connected to V
SS
)
19
16
Input
B
NOTES:
1.
2.
Pull-up resistors for all I/O ports are automatically disabled if they are configured to output mode.
D
*
Type has a schmitt trigger circuit at input.
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