參數(shù)資料
型號: KS32C6100
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 16/32-Bit RISC Microcontroller(16/32-位 RISC微控制器)
中文描述: 16/32位RISC微控制器(16/32位的RISC微控制器)
文件頁數(shù): 1/5頁
文件大?。?/td> 32K
代理商: KS32C6100
KS32C6100 RISC MICROCONTROLLER
TECHNICAL SUMMARY
1-1
Preliminary
OVERVIEW
Samsung’s KS32C6100 16/32-bit RISC microcontroller provides a cost-effective and high-performance
microcontroller solution for laser beam printers (LBP) with PCL/PDL interpreters. To accelerate raster image
generation, the KS32C6100 directly processes scanned image data for the laser printer engine.
An outstanding feature of the KS32C6100 is its CPU core, a 16/32-bit RISC processor (ARM7TDMI) designed by
Advanced RISC Machines, Ltd. The ARM7TDMI core is a low-power, general-purpose, microprocessor macro-
cell that was developed for use in application-specific and customer-specific integrated circuits. Its simple,
elegant, and fully static design is particularly suitable for cost-sensitive and power-sensitive applications.
The KS32C6100 was developed using the ARM7TDMI core, 0.5-μm standard cells, and a data path compiler.
Most of the on-chip function blocks were designed using a HDL synthesizer. The KS32C6100 has been fully
verified in Samsung
s ASIC test environment.
By providing a complete set of common system peripherals, the KS32C6100 minimizes overall system costs and
eliminates the need to configure additional components.
The main integrated on-chip function blocks which are described in this document include:
ROM/SRAM/DRAM controller
4Kbyte Instruction/Data cache
Three-channel DMA controller
UART/Serial IO
Parallel port interface controller (PPIC)
Five 16-bit timers including tone generator and watch dog timer
Printer interface controller (PIFC)
Graphic engine unit (GEU)
Image functional unit including image expander, image rotator, VIS and halftoner
Programmable I/O ports
Interrupt controller
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