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參數(shù)資料
| 型號(hào)： | KS0741 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 128 SEG / 129 COM DRIVER & CONTROLLER FOR 4 GRAY SCALE STN LCD |
| 中文描述： | 128賽格/ 129 COM驅(qū)動(dòng)程序 |
| 文件頁數(shù)： | 15/74頁 |
| 文件大?。?/td> | 985K |
| 代理商： | KS0741 |
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KS0741 PRELIMINARY SPEC. VER. 1.2 128 SEG / 129 COM DRIVER & CONTROLLER FOR STN LCD
11
MICROPROCESSOR INTERFACE
Table 6. Microprocessor Interface Pin Description
Name
I/O
Description
RESETB
I
Reset input pin
When RESETB is “L”, initialization is executed.
Parallel / Serial data input select input
PS0
Interface
mode
Data /
instruction
Data
Read / Write
Serial clock
H
Parallel
RS
DB0 to DB7
E_RD
RW_WR
Write only
-
L
Serial
RS or None
SID (DB7)
SCLK (DB6)
PS0
I
*NOTE: In serial mode, it is impossible to read data from the on-chip RAM. And DB0 to DB5
are high impedance and E_RD and RW_WR must be fixed to either “H” or “L”.
Microprocessor interface select input pin
PS0 = “H” , PS1 = "H": 6800-series parallel MPU interface
PS0 = “H” , PS1 = "L": 8080-series parallel MPU interface
PS0 = “L” , PS1 = "H": 4 pin-SPI MPU interface
PS0 = “L” , PS1 = "L": 3 pin-SPI MPU interface
Chip select input pins
Data/instruction I/O is enabled only when CSB is "L". When chip select is non-active, DB0
to DB7 may be high impedance.
Register select input pin
RS = "H": DB0 to DB7 are display data
RS = "L": DB0 to DB7 are control data
Read / Write execution control pin
C68
MPU type
RW_WR
Read / Write control input pin
RW = “H” : read
RW = “L” : write
Write enable clock input pin
The data on DB0 to DB7 are latched at the rising
edge of the /WR signal.
PS1
I
CSB
I
RS
I
Description
H
6800-series
RW
L
8080-series
/WR
RW_WR
I
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PDF描述 |
|---|---|
| KS0759 | 81 COM / 128 SEG DRIVER & CONTROLLER FOR STN LCD |
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
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| KS0794 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:160 COM / 160 SEG DRIVER FOR STN LCD |
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