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參數(shù)資料
| 型號： | KS0718 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | CAP, TANT, 10UF, 10V, 3216, 20%, SM |
| 中文描述： | 81的COM / 104賽格驅動 |
| 文件頁數(shù)： | 18/66頁 |
| 文件大?。?/td> | 724K |
| 代理商： | KS0718 |
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KS0718 SPEC. VER. 1.4
81 COM / 104 SEG DRIVER & CONTROLLER FOR STN LCD
15
DISPLAY DATA RAM (DDRAM)
The Display Data RAM stores pixel data for the LCD. It is 89-row by 104-column addressable array. Each pixel
can be selected when the page and column addresses are specified. The 89 rows are divided into 11 pages of 8
lines and the 12th page with a single line (DB0 only). Data is read from or written to the 8 lines of each page
directly through DB0 to DB7. The display data of DB0 to DB7 from the microprocessor correspond to the LCD
common lines as shown in figure 6. The microprocessor can read from and write to RAM through the I/O buffer.
Since the LCD controller operates independently, data can be written into RAM at the same time as data is being
displayed without causing the LCD flicker.
COM0
COM1
COM2
COM3
COM4
- -
- -
- -
- -
- -
DB0
DB1
DB2
DB3
DB4
0
1
0
1
0
0
0
1
0
0
1
0
1
1
0
- -
- -
- -
- -
- -
0
1
0
0
1
Display Data RAM LCD Display
Figure 6. RAM-to-LCD Data Transfer
Page Address Circuit
This circuit is for providing a Page Address to Display Data RAM shown in figure 8. It incorporates 4-bit Page
Address register changed by only the "Set Page" instruction. Page Address 11 (DB3, DB1 and DB0 are "H", DB2
is "L") is a special RAM area for the icons and display data DB0 is only valid.
Line Address Circuit
This circuit assigns DDRAM a Line Address corresponding to the first line (COM0) of the display. Therefore, by
setting line address repeatedly, it is possible to realize the screen scrolling and page switching without changing
the contents of on-chip RAM as shown in figure 8 & figure 9. It incorporates 7-bit Line Address register changed
by only the initial display line instruction and 7-bit counter circuit. At the beginning of each LCD frame, the
contents of register are copied to the line counter which is increased by CL signal and generates the Line Address
for transferring the 104-bit RAM data to the display data latch circuit. However, display data of icons are not
scrolled because the MPU can not access Line Address of icons.
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相關代理商/技術參數(shù) |
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|---|---|
| KS0724 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:65 COM / 132 SEG DRIVER & CONTROLLER FOR STN LCD |
| KS0741 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128 SEG / 129 COM DRIVER & CONTROLLER FOR 4 GRAY SCALE STN LCD |
| KS0759 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:81 COM / 128 SEG DRIVER & CONTROLLER FOR STN LCD |
| KS0794 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:160 COM / 160 SEG DRIVER FOR STN LCD |
| KS08 | 制造商:TME 功能描述:PROBE SURFACE HIGH TEMPERATURE 制造商:TME 功能描述:PROBE, SURFACE, HIGH TEMPERATURE |
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